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LG 42PQ30 - - 42" Plasma TV Training Manual

LG 42PQ30 - - 42" Plasma TV Manual Online:

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LG 42PQ30 - - 42" Plasma TV User Manual
LG 42PQ30 - - 42" Plasma TV User Guide
LG 42PQ30 - - 42" Plasma TV Online Manual

Text of LG 42PQ30 - - 42" Plasma TV User Guide:

  • LG 42PQ30 - - 42" Plasma TV, 84 Preliminary Information 42PQ30 The LVDS Cable has two “Interlocks” that must be disengaged to remove the LVDS Cable. To Disengage, press the two Locking Tabs Inward and pull the plug out. Removing the LVDS Cable from the Control Board Removing the LVDS Cable from the Control Board Press Inward Press Inward

  • LG 42PQ30 - - 42" Plasma TV, 63 Preliminary Information 42PQ30 Y-Drive Board works as a path supplying the Sustain and Reset waveforms which are made in the Y SUSTAIN Board and sent to the Panel through SCAN DRIVER IC’s. The Y Drive Boards supply a waveform which selects the horizontal electrodes sequentially. * 42PQ30 uses 8 DRIVER ICs on 1 Y Drive Board Y Y - - DRIVE BOARD SECTION (Y DRIVE BOARD SECTION (Y - - Drive Explained) Drive Explained) Y DRIVE WAVEFORM To facilitate scope attachment, solder a small wire (Stand Off) at this point. Y DRIVE WAVEFORM TEST POINT

  • LG 42PQ30 - - 42" Plasma TV, 62 Preliminary Information 42PQ30 Y Y - - SUS FG5V, FG15V And 17V Testing SUS FG5V, FG15V And 17V Testing FG 15V FG 20V FG 5V FG 9V IC508 D508 IC507 FG FG D508 Cathode FG20V Source D509 Cathode FG9V Source D509 D509 D506 Cathode 17V Source 17V T502 FG20V FG9V BACK SIDE OF THE Y-SUS BOTTOM CENTER OF THE BOARD Use External 5V Source connected to M5V Input for test. Read FG voltages from Floating GroundRead 17V from Chassis Ground

  • LG 42PQ30 - - 42" Plasma TV, 23 Preliminary Information 42PQ30 Getting to the X Circuit Boards Getting to the X Circuit Boards A D C E Right E Left F Heat Sink B B Warning: Never run the TV with the TCP Heat Sink removed Warning Shorting Hazard: Conductive Tape. Do not allow to touch energized circuits.

  • LG 42PQ30 - - 42" Plasma TV, 78 Preliminary Information 42PQ30 X101 Crystal 25Meg D201 Data LED P162 P161 P111 LVDS To X Drive Left T o X D r i v e R i g h t P131 P121 IC231 AUTO GEN TEST PATTERN Control Board Identified Control Board Identified Waveform Generation Software Download Connection To P101 Y-SUS Part Number Label n/c 5V 1.8V 0V 4.8V 0V 3.3V 5V To P2 Z-SUS P101 To P1002 Main ROM IC101 Vs DA 3.2V FL111 FL112 5V 3.3V 3.3V 0V 3.3V 1) 3.3V 2) 0V 3) 3.3V 4) 0V 5) 3.3V 6) 3.3V 7) 0V 8) 3.3V IC1 EEPROM FL204 1V Protect 1V 3.3V IC211 IC201 MCM IC252 IC221 IC1 Pin 1

  • LG 42PQ30 - - 42" Plasma TV, 87 Preliminary Information 42PQ30 2.8V0.12V0VSET_DN29 2.8V0.13V0VSUS_UP27 2.8V0.2V0VER_UP25 2.8V1.05V0VDummy 123 2.8V0.17V0VDummy 521 2.8V2.5V0VSet_Up19 2.8V0V0VER_DN17 2.8V0V0VSUS-DN15 Open0V0VOE13 GndGndGndGnd11 GndGndGndGnd9 0.97V5V0V5V7 0.97V5V0V5V5 0.97V5V0V5V3 Open15V0V15V1 Diode ModeRun STBYLabelPin GndGndGndGnd30 3.2V0.1V0VCTRL_OE28 2.8V1.28V0VDummy 426 2.8V0V0VDummy 324 2.8V0.6V0VCLK22 2.8V2.96V0VSTB20 2.8V1.4V0VBLK18 2.8V0V0VData16 2.8V1.89V0VOC214 2.8V2.16V0VDummy 212 GndGndGndGnd10 GndGndGndGnd8 0.97V5V0V5V6 0.97V5V0V5V4 Open15V0V15V2 Diode ModeRun STBYLabelPin Diode

  • 34 Preliminary Information 42PQ30 VS VR901 AC Input SC 101 380V Source VS Source VA Source STBY 5V 17V, 12V Source IC701 Sub Micon VA VR502 Switch Mode Power Supply Circuit Layout Switch Mode Power Supply Circuit Layout PFC Circuit To MAIN P813 Main Fuse F101 6.3Amp/250V 4Amp/250V P811 To Y-SUS 338V Stby 388V Run Fuse F801 1Amp/250V Main Bridge Rectifier 33

  • LG 42PQ30 - - 42" Plasma TV, 41 Preliminary Information 42PQ30 Vs TP P811 Pin 1 or 2 Use Full White Raster “White Wash” SMPS Va and Vs Adjustments SMPS Va and Vs Adjustments Va TP P811 Pin 6 or 7 Important: Use the Panel Label Not this book for all voltage adjustments.

  • 33 Preliminary Information 42PQ30 The Switch Mode Power Supply Board Outputs to the : VA Y-SUS Board Main Board VS M5V VCC Primarily responsible for Display Panel Vertical Grid Drives the Display Panel Horizontal Grid Used to develop Bias Voltages on the Y-SUS, X Drive, and Control Boards 16V Audio B+ Supply 5V Signal Processing Circuits Adjustments There are 2 adjustments loc

  • LG 42PQ30 - - 42" Plasma TV, 95 Preliminary Information 42PQ30 TCP Visual Observation. Damaged TCP TCP Visual Observation. Damaged TCP This damaged TCP can, a) Cause the Power Supply to shutdown b) Generate abnormal vertical bars c) Cause the entire area driven by the TCP to be “All White” d) Cause the entire area driven by the TCP to be “All Black” e) Cause a “Single Line” defect Warning: DO NOT attempt to run the set with the Heat Sink over the TCPs removed. After a very short time, these ICs will begin to self destruct due to overheating.

  • 112 Preliminary Information 42PQ30 The Ft Power LED Board includes the IR Receiver and the Intelligent Sensor. The Front POWER LED is also located on this board. Ft Power LED (IR) Board Layout Ft Power LED (IR) Board Layout Back View Front View IR Sensor INTELLIGENT Sensor FRONT POWER LED J2 J1 To Main Board To Front Keys

  • LG 42PQ30 - - 42" Plasma TV, 73 Preliminary Information 42PQ30 + VZ (Z VZ (Z - - Bias) Adjustment Bias) Adjustment VZ (Z-Bias) TP Right Side R49 or R50 Read the Label on the back of the upper left hand side of the panel. Adjust using VR8. Set should run for 15 minutes, this is the “Heat Run” mode. Set screen to “White Wash” mode or 100 IRE White input. Adjust VZ (Z-Bias) to Panel Label (± 1V) Z Bias Bottom Center of Z-SUS Board VR8 Measured from Chassis Ground

  • LG 42PQ30 - - 42" Plasma TV, 26 Preliminary Information 42PQ30 Left and Right X Drive Removal Left and Right X Drive Removal Remove the 4 screws for either Board or 7 total for both. (The Center screw secures both Boards) Right X Board drive the left side of the screen Left X Board drives the right side of the screen

  • LG 42PQ30 - - 42" Plasma TV, 75 Preliminary Information 42PQ30 Diode Mode Readings taken with all Connectors Disconnected. DVM in Diode Mode. Z Z - - SUS P3 Connector to Y SUS P3 Connector to Y - - SUS P206 Voltage and Diode Checks SUS P206 Voltage and Diode Checks Voltage and Diode Mode Measurements * Note: This voltage will vary in accordance with Panel Label Open*193V0VVS8 Open*193V0VVS7 Openncncnc6 GndGndGndGnd5 GndGndGndGnd4 Openncncnc3 Open*94.9V0VER COM2 Open*94.9V0VER COM1 Diode ModeRun STBYLabelPin P3 Connector “Z-SUS Board" to “Y-SUS Out" P206

  • LG 42PQ30 - - 42" Plasma TV, 19 Preliminary Information 42PQ30 Y SUS Board Z-SUS Board Right “X” Left “X” Main Board Control Board Power Supply (SMPS) Board FPC FPC Panel ID Label Panel Voltage Label Y Drive Control Keys Master Power FPC Invisible Speakers FPC FPC FPC FPC FPC TCP Heat Sink AC In Conductive Tape Under Main Board Side Input (part of main) 42PQ30 Circuit Board Layout 42PQ30 Circuit Board Layout

  • LG 42PQ30 - - 42" Plasma TV, 115 Preliminary Information 42PQ30 The Ft Key Board contains the Master Power Switch, Volume Up/Down and Channel Up/Down keys. Also the Menu and Select keys. FRONT KEY BOARD SECTION FRONT KEY BOARD SECTION Back View Front View Rear View Main Power Switch P101 To Front LED Board Front View Pin c Pin c

  • LG 42PQ30 - - 42" Plasma TV, 93 Preliminary Information 42PQ30 TCP Testing TCP Testing Typical Reading 0.65V 5 10 15 20 25 30 35 40 45 501 On any Gnd On any Va or 3.3V 4,5,6,7,44,45,46,47 10,11,12,13,14,27,28,2 9,30,37,38,39,40,41 Look for any TCPs being discolored. Ribbon Damage. Cracks, folds Pinches, scratches, etc… Va VaGnd Gnd - + Reverse leads Reading Open

  • LG 42PQ30 - - 42" Plasma TV, 42PQ30 Main Board Regulator Checks (Back Side) 42PQ30 Main Board Regulator Checks (Back Side) 102 IC505 Tuner 5V Reg IC202 HDCP EEPROM IC201 NVRAM IC304 1.8V_MST regulator IC305 3.3V_MST Regulator P1002 IC803 HDMI 4 IC802 HDMI 1 IC601 TU501 TUNER IC602 MAIN PWB (Back Side View) IC503 1) 9.3V 2) 0V 3) 13.8V IC305 1) 0V 2) 3.4V 3) 05.1V IC304 1) 0.63V 2) 1.93V 3) 3.4V IC602 1,2,3,4) 0V 5) 4.73V 6) 4.73V 7) 3.44V 8) 4.71V IC202 1,2) 3.4V 3) 0V 4) 3.4V 5,6) 0V 7) 3.39V 8) 0V IC201 1,2) 3.4V 3)

  • 51 Preliminary Information 42PQ30 Very little alteration to the picture, the wave form indicates a distorted Vset UP. The peek widens due to the Vset UP peeking too quickly. The center begins to wash out and arc due to Vset UP Peeking too late and alters the start of the Vset DN phase. Panel Waveform Adjustment Ramp (Vset UP) too high Ramp (Vset UP) too low V Set Up

  • LG 42PQ30 - - 42" Plasma TV, 116 Preliminary Information 42PQ30 Voltage and Diode Mode Measurements for the Main Board Diode Mode Readings taken with all Connectors Disconnected. DVM in Diode Mode. Front LED Board Plug P101 to Ft LED Board Voltage and Diode Chec Front LED Board Plug P101 to Ft LED Board Voltage and Diode Chec ks ks Gnd PWR Key Key 2 Key 1 Label Gnd Gnd 3.29V 3.29V *STBY2 GndGndGnd4 OpenGnd4.38V3 Open3.29V0V2 Open3.29V0V1 Diode ModeRun *STBY1Pin P101 Connector “Ft Key Board" to "Ft LED" P101 Pin c *STBY2 Main Power Switch “IN” Normal *STBY1 Main Power Switch “OUT” Vacation

  • LG 42PQ30 - - 42" Plasma TV, 57 Preliminary Information 42PQ30 Voltage and Diode Mode Measurements for the Y SUS Board Diode Mode Readings taken with all Connectors Disconnected. DVM in Diode Mode. Y Y - - SUS P801 to Z Drive P1 Voltage and Diode Checks SUS P801 to Z Drive P1 Voltage and Diode Checks * Note: This voltage will vary in accordance with Panel Label Gnd*193V0VVS8 Open*193V0VVS7 ncncncnc6 GndGndGndGnd5 GndGndGndGnd4 ncncncnc3 Open*94.9V0VEr Com2 Open* 94.9V0VEr Com1 Diode ModeRun STBYLabelPin P206 Connector Y-SUS to Z Drive P1 Plug Information

  • 52 Preliminary Information 42PQ30 All of the center washes out due to increased Vset_DN time. The center begins to wash out and arc due to decreased Vset DN time. Panel Waveform Adjustment Vset DN too high Vset DN too low V Set V Set Dn Dn Too High or Low Too High or Low Vset Dn swing is Minimum 110uS Max 200uS+ NOTE: If VSET-DN is too high, this set will go to excessive bright, t

  • LG 42PQ30 - - 42" Plasma TV, 82 Preliminary Information 42PQ30 LVDS Video Signals from the Main Board to the Control Board are referred to as Low Voltage Differential Signals or LVDS. Their presence can be confirmed with the Oscilloscope by monitoring the LVDS signals with no input signal selected while pressing the Menu Button “on” and “off” with the Remote Control or Keypad. Loss of these Signals would confirm the failure is on the Main Board! Example of Normal Signals measured at 200mv/cm at 5µs/cm. Menu Off Menu ON LVDS Cable P121 on Control Board shown. Press two outside tabs inward to release. Control LVDS Signals Control LVDS Signals C

  • LG 42PQ30 - - 42" Plasma TV, 64 Preliminary Information 42PQ30 P101 Floating Gnd +5V 5 Volts, Y Drive and Logic Signals from Y SUS Board are supplied to the Drive Board on Connectors P104. Y Drive Board ID Y Drive Board ID Y Drive and Logic Signals (Clock and Data) from the Y SUS Board TOP BOTTOM Check 5V supply using FL1 or across C18. Measured from Floating Ground Floating Ground from the Y SUS Board P101, P103, P102 and pins 1 and 7 of P104 Y-SUS SIDE P103 P102 P104 Y Drive Scan Signal Input Y Drive Scan (VSC) Signal Input TP

  • 71 Preliminary Information 42PQ30 VS Input from the Y-SUS P3 Z Z - - SUS Board Layout SUS Board Layout P6 Logic Signals from the Control Board Also +15V and +5V P2 VZ (Z-Bias) TP Right side R49 or R50 Read the Label on the back of the upper left hand side of the panel. Z SUS Output ICs Z-Bias ADJ VR8 No IPMs P7 FPC FPC Z SUS Waveform Development ICs Z SUS Wavefo

  • LG 42PQ30 - - 42" Plasma TV, 80 Preliminary Information 42PQ30 Control Board Testing Control Board Testing For quick Board test. (All Board Connectors Disconnected). Jump 5V from Power Supply to IC201 Pin 1. (Bottom Pin) If the LED blinks, Pretty much guaranteed, Board is OK. Quick observation Of LED blinking Tell if the Control Board is running. When the Television has a problem related to; 1) Shutdown caused by Main Board 2) No Video (No Picture) Sound OK. This can be checked by the following. (1) Disconnect the Main Board from all Connectors. Apply AC power. Since P813 is not connected to the

  • LG 42PQ30 - - 42" Plasma TV, 92 Preliminary Information 42PQ30 TCP ICs supply RGB 16 bit signal to the PDP by connecting the PAD Electrode of the PANEL with the X Board. TCP C o n n e c t o r Frame X_B/D Front panel Horizontal Address Rear panel Vertical Address TCP (Tape Carrier Package) TCP (Tape Carrier Package) Control Board Back side of TCP Ribbon TCP Taped Carrier Package F l e x i b l e Ca b l e Y-SUS Board Va Logic C o nne c t o r X Drive Board Heat Sink

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