HP H8/3003 Operation & User’s Manual

Text of HP H8/3003 User Guide:

• HP H8/3003, 4 Configuring the H8/3003 Emulator In this chapter, we will discuss: how to configure the HP 64700 emulator for H8/3003 microprocessor to fit your particular measurement needs. some restrictions of HP 64700 emulator for H8/3003 microprocessor. Types of Emulator Configuration Emulation Processor to Emulator/Target System These are the commands which are generally thought of as "configuration" items in the context of other HP 64700 emulator systems. The commands in this group set up the relationships between the emulation processor and the target system, such as determining how the emulator responds to requests for the processor bu

• HP H8/3003, Stepping Through the Program 8. You can also direct the emulator processor to execute one instruction or number of instructions. Type: M> s 1 1000;reg This command steps 1 instruction from address 1000 hex, and displays registers. You will see: 0001000 - MOV.L #000ff904,ER7 PC =0001006 reg pc=001006 ccr=80 er0=00000000 er1=000ff800 er2=00000000 er3=00000000 reg er4=00000000 er5=00000000 er6=00000000 er7=000ff904 sp=000ff904 mdcr=c7 Notice that PC contains 1006 hex. 9. To step one instruction from present PC, you only need to type s at prompt. Type: M> s;reg You will see: 00

• HP H8/3003, 6 The emulator will operate in mode 6. (single chip normal mode) 7 The emulator will operate in mode 7. (single chip advanced mode) Note It is recommended to specify operation mode number in this configuration, since the emulator does not work fine when MD0,MD1 and MD2 are not steady. Note When you emulate H8/3004/05, cf mode = ext is not available. You have to configure processor mode using cf mode=<mode_num> Note When mismatch takes place between cf chip and cf mode, the emulator will operate in mode which you don’t specify. Note Executing this command will drive the emulator into the reset state. 4-10 Configuring the Emulator

• HP H8/3003, 3 In-Circuit Emulation When you are ready to use the H8/3003 emulator in conjunction with actual target system hardware, there are some special considerations you should keep in mind. installing the emulator probe properly configure the emulator We will cover the first topic in this chapter. For complete details on in-circuit emulation configuration, refer to Chapter 4. 3-1 In-Circuit Emulation

• Initialize the Emulator to a Known State To initialize the emulator to a known state for this tutorial: Note It is especially important that you perform the following step if the emulator is being operated in a standalone mode controlled by only a data terminal. The only program entry available in this mode is through memory modification; consequently, if the emulator is reinitializ

• Index A ADDRESS syntax, A-6 Analyzer configuration, 2-23 configuration commands, 4-2 halting, 2-25 matters to be attended to, 2-30 pipeline, 2-25 storage specification, 2-23 - 2-24 trace, 2-22 trace list display, 2-24 trace list format, 2-24 trigger, 2-23 trigger specification, 2-23 triggering by data, 2-34 analyzer status predefined equates, 2-23 Analyzer trace starting, 2-24 B

• HP H8/3003, As you can see, all of the requested states have been captured by the analyzer. Line addr,H data,A count,R seq ----- ------ ------ --------- --- 0 0ff804 .. --- + 1 0ff805 .. 0.760 uS . 2 0ff806 .. 0.720 uS . 3 0ff807 .. 0.760 uS . 4 0ff808 .. 0.760 uS . 5 0ff809 .. 0.760 uS . 6 0ff80a .. 0.720 uS . 7 0ff80b .. 0.760 uS . 8 0ff80c .. 0.760 uS . 9 0ff80d .. 0.760 uS . 10 0ff80e .. 0.720 uS . 11 0ff80f .. 0.760 uS . 12 0ff810 ..

• HP H8/3003, itu3 (16 bit integrated timer pulse unit 3) tcr3 tior3 tier3 tsr3 tcnt3 gra3 grb3 bra3 brb3 Timer control register 3 Timer I/O control register 3 Timer interrupt enable register 3 Timer status register 3 Timer counter 3 General register A3 General register B3 Buffer register A3 Buffer register B3 itu4 (16 bit integrated timer pulse unit 4) tcr4 tior4 tier4 tsr4 tcnt4 gra4 grb4 bra4 brb4 Timer control register 4 Timer I/O control register 4 Timer interrupt enable register 4 Timer status register 4 Timer counter 4 General register A4 General regi

• HP H8/3003, Note Without a stack pointer, the emulator is unable to make the transition to the run state, step, or perform many other emulation functions. However, using this option does not preclude you from changing the stack pointer value or location within your program; it just sets the initial conditions to allow a run to begin. cf tdma The tdma (trace internal DMA cycles) configuration item defines whether or not the emulator traces internal DMA cycles. M> cf tdma=en When you enable this item with th

• A Look at the Sample Program The sample program "COMMAND_READER" used in this chapter is shown figure 2-1. The program emulates a primitive command interpreter. Data Declarations Msg_A, Msg_B and Msg_I are the messages used by the program to respond to various command inputs. Initialization The locations of stack and input area(Cmd_Input) are moved into address r

• HP H8/3003, Table 1-2. Clock Speeds Clock source Chip Without 64797B With 64797B Internal H8/3001 H8/3002 H8/3003T H8/3004 H8/3005 H8/3030 H8/3031 H8/3032 H8/3040 H8/3041 H8/3042 16MHz (System clock) 8MHz (System clock) H8/3003 with system clock divider 8MHz (System clock) 8MHz (System clock) External H8/3001 H8/3002 H8/3003T H8/3004 H8/3005 H8/3030 H8/3031 H8/3032 H8/3040 H8/3041 H8/3042 From 0.5 up to 16MHz (System clock) From 0.5 up to 10MHz (System clock) H8/3003 with system clock divider From 1 up to 24MHz (System clock is from 0.5 up to 12MHz) From 1 up to 20MHz (System clock is from 0.5

• cf ba The ba (bus arbitration) configuration item defines how your emulator responds to bus request signals from the target system. M> cf ba=en When bus arbitration is enabled, the /BREQ (bus request) signal from the target system is responded to exactly as it would be if only the emulation processor was present without an emulator. In other words, if the emulation processor receives a /BREQ

• HP H8/3003, Table 3-6. Bus timing (Vcc = 3.0V, f = 10MHz) (Cont’d) Characteristics Symbol H8/3003 Vcc = 3V f = 10MHz Probe Type Unit HP 64797B + HP 64784x min max typ *1 worst WAIT setup time t WTS 40 - 30.2 63.1 ns WAIT set hold time t WTH 10 - -27.6 -13.0 ns BREQ setup time t BRQS 40 - - 78.1 ns BACK delay time 1 t BACD1 - 50 10.8 36.6 ns BACK delay time 2 t BACD2 - 50 -4.0 36.6 ns Bus floating time t BZD - 70 17.8 46.6 ns *1 Typical outputs measured with 50pF load 3-22 In-Circuit Emulation

• HP H8/3003, Table 3-3. Refresh controller timing (Vcc = 5.0V, f = 16MHz) Characteristics Symbol H8/3003 Vcc = 5V f = 16MHz Probe Type Unit HP 64784E + HP 64784x HP 64784D min max typ *1 worst typ *1 worst RAS delay time 1 t RAD1 - 30 23.6 41.6 17.8 39.0 ns RAS delay time 2 t RAD2 - 30 22.2 41.6 16.2 39.0 ns RAS delay time 3 t RAD3 - 30 8.0 41.6 6.6 39.0 ns Row address hold time t RAH 15 - 22.0 -10.5 27.0 -9.5 ns RAS pre-charge time t RP 35 - 60.8 25.8 61.4 26.7 ns CAS to RAS pre-charge time t CRP 35 - 61.4 28.6 60.2 29.1 ns CAS pulse width t CAS 40 - 52.8 33.6 53.2 34.1 ns RAS access time t RAC - 85 74.4 44.4 82.8 49.0 ns Address

• HP H8/3003, The H8/3003 emulator is provided without any QFP adaptors and PGA adaptor(HP 64784E) with QFP probe. To emulate each processor with your target system, you need to purchase appropriate QFP adaptor or PGA adaptor with QFP probe listed in Table 1-1. To purchase them, contact your local HP sales representative. You can buy HP 64797B low voltage adaptor to emulate each processor running with supply voltage from 2.7 up to 5.25V input in your target system. To buy HP 64797B, contact your local HP sales representative. The list of supported microprocessors in Table 1-1 is not necessarily complete. To determine if your microprocessor is supported or not, conta

• HP H8/3003, Table 3-5. Timing condition of On-chip supporting modules (Cont’d) (Vcc = 5.0V, f = 16MHz) Characteristics Symbol H8/3003 Vcc = 5V f = 16MHz Probe Type Unit HP 64784E + HP 64784x HP 64784D min max typ *1 worst typ *1 worst SCI Input clock cycle(Async) t SCYC 4-----tcyc Input clock cycle(Sync) t SCYC 6-----tcyc Input clock rise time t SCKr - 1.5 - - - - tscyc Input clock fall time t SCKf - 1.5 - - - - tscyc Input clock pulse width t SCKw 0.4 0.6 - - - - tscyc Transmit data delay time t TXD - 100 - 105.8

• HP H8/3003, You will see: # remaining number of terms : 15 # remaining emulation memory : 6e800h bytes map 0000000..000ffff erom # term 1 map other tram Note You must map internal ROM as emulation memory. Note You don’t have to map internal RAM, since the emulator maps internal RAM as emulation RAM. And the emulator memory system dose not introduce it in memory mapping display. Refer to "Memory Mapping" section of "Configuring the Emulator" chapter in this manual for more details. Transfer Code into Emulation Memory Transferring Code from a Terminal In Standalone Configuration To transfer code into emulation

• HP H8/3003, port (I/O port) p1ddr p2ddr p3ddr p4ddr p5ddr p6ddr p8ddr p9ddr p addr pbddr pcddr p1dr p2dr p3dr p4dr p5dr p6dr p7dr p8dr p9dr padr pbdr pcdr p2pcr p4pcr p5pcr Port 1 data direction register(Write Only)*1,2 Port 2 data direction register(Write Only)*1,2 Port 3 data direction register(Write Only)*1,2 Port 4 data direction register(Write Only)*5 Port 5 data direction register(Write Only)*1 Port 6 data direction register(Write Only)*1 Port 8 data direction register(Write Only) Port 9 data direction register(Wri

• HP H8/3003, Predefined Status Equates Common values for the H8/3003 status trace signals have been predefined. You can view these predefined equates by entering the equ command with no options. M> equ These equates may be used to specify values for the stat trace label when qualifying trace conditions. Specifying a Trigger Now let’s use the emulation analyzer to trace execution of the program. Suppose that you would like to start the trace when the analyzer begins writing data to the message output area.You can do this by specifying analyzer trigger upon encountering the address ff804 hex. Furthermore, you might want to store only the data written to the output area. This can

• HP H8/3003, installing the PGA adaptor, 3-6, 3-11 installing the QFP adaptor, 3-5 PGA adaptor, 3-3 QFP adaptor, 3-3 QFP probe, 3-4 QFP socket/adaptor, 3-4 Information help, 2-7 init Command, 2-8 Initializing the Emulator, 2-8 installing H8/3003 microprocessor, 3-9 Installing target system probe target system probe, 3-2 internal RAM mapping, 4-17 Internal ROM access, 4-16 Interrupts enable/disable from target system, 4-11 L labels (trace), predefined, 2-22 limitations DMA support, 1-9 Hardware standby mode, 1-9, 4-14 internal RAM of H8/3005, 1-9 Interrupts in background, 1-9 Reset outpu

• 49 ;**************************************************** 50 ;* An invalid command is entered. 51 ;**************************************************** 001046 FB0F 52 Cmd_I MOV.B #End_Msgs-Msg_I,R3L 001048 7A0400002022 53 MOV.L #Msg_I,ER4

• HP H8/3003, bc -d bp #disable bc -d rom #disable bc -d bnct #disable bc -d cmbt #disable bc -e trig1 #enable bc -e trig2 #enable (items in bold indicate improper values for this example) Type the following commands to set the break conditions correctly for this example: R> bc -e rom (this enables the write to ROM break) R> bc -d trig1 trig2 (this disables break on triggers from the analyzer) Mapping Memory Depending on the memory board, emulation memory consists of 128K, 512K, 1M or 2M bytes, mappable in 512 byte blocks. The monitor occupies 2K byte

• HP H8/3003, busc (Bus controller) abwcr astcr wcr wcer brcr Byte/Word area control register * 2/3 state area control register Wait control register Wait controller enable register Bus release control register * * Except 3030, 3031,3032 rfshcr (Refresh controller) The following registers does not exist in 3030, 3031, and 3032 rfshcr rtmcsr rtcnt rtcor Refresh control register Refresh timer control/status register Refresh timer counter Refresh time constant register dmac0 (DMA controller 0) The following registers does not exist in 3030, 3031, and 3032 mar0a etcr0a ioar0a dtcr0a mar0b etcr0b ioar0b dtcr 0b Memory address register 0A Transfer count registe

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