Hitachi 505 Operation Manual
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The procedure for inserti-ng and removing the pre-patch panel is described in Paragraph 2.b. (2) Patch the Digital vortmeter (nvru) and multi-range voltmeter (wt) to the selector readout system. (see Figure 2.J-2 and ?ara- graph 2.c. of this section for a deseription of the selector system nnonr*.i a- \ e) Apply power to the com
Hitachi 505, *r-. 1b APFEND]X 7 N0. TRANSFER FUI{CTIOI\ T]ME CONSTANTS BODE PLOT GAINS -Dl. 5 l+T?n * - /r lt ,m- \ /r,m^ \ 1-r-rr_lp/ \rruzpl T -I A '1 'I-^ = - L/ n nn - D-U.IJ _1 ra 2 IJJ.J 1 m rl -i 1 Te -2 L) 1 r," ^ tF^-f-^/-* v L) L1 T^ =;:.F- LIL' u- (b) The foliowing table contai-irs the shtrrt-circuit values for some useful networks for sirnulating mcre extensi-ve listing nay be found in Jackson, and Fifer, S.: ttAnalog Comprtationfr. ad.mittance and comPonent tran
Hitachi 505, '1! \; '3 1f i( *.r f +-t \r q .- 1" '" 4i ,.fu 'fl !q or t,r "i'.j {*.r O O rt + (J trr +l I F.r I lrn | :- 'p lkl IH L_ Frl i- trl HL ;r O 6 O rt I z -t ,\ \4 a\ F! _tl ä tl E I-J \J /11 A t XHd X r t)(E Y-- to öl It'-- =ö- | l()<) '^^ L/-J rnEnr I'V.V I ESssl tl ltL llrl ttl ü Ftr a) is öLS:, H F- z H -77-
Hitachi 505, A. VFG CARD LOCATION DD];I D/ TTN LI r tu-r 6l v 11 PANEL ARilAS VFG LOCATIONS b. VFG LOCATIONS AND ASSOCIATED PRET.?ATCH PANEL AXEAS FIGTm-il 2.7'LL VFG CA-RI L0CATION SH0|^IING CHASSIS IN SEt UP POSilION FGO3 FG0-1 FG0-2 FGl-t FG1-2 FG2-1 FcZ-2 O-'IER- LOAD AMPT, 0I-, o5t TW- o5r DITH. ER FG- o57 FG- o5u OR FG- o52 FG. o51B utt FG. o52 FG- 051A OR FG. o52 FG. o51e OR FG- FG- 0511, OR FG- FG. n41 R OR FG- o52 - lÖ-
h F r,-l r,r li r f-I Ft h n F $) Other Mathenatical Operations As pr:eviously indicated the operational amplifier has uses other than those jadicated in zub- paragraph (t) tfrrough (2). Conplicated transfer firnctions can be simulated by using series and parallel RC networks for the feed- back and input impedances. The ci-rcuit performance is
Hitachi 505, N LN O I a Pr Ff ;Ä4 trr<< Pr E-r Pr 6oe. az. Eü> =pdin OOFf Pr Fq kl n :r I 1 I \ 1 :t -l -l f :l ll :I r-l h I l_ I T d 9H v. F- trH 7, 11 ;-i F- OO tr;€ 14< ?= <H za il a-) EJ ZH olr r->Pr z F] H d< rÄz F<H E'l co R o rn I a F-l o a 2 o (J Ff o d 94 z h o l-l z ü H (r)E o FfH o() E f'] EA oo o(f Hd dä E:{ p{EHE btr] ztd (DHr4> HHEH ESAE Oi FE{ trl O I .Ei H(J sdE E;ä Pr ü) L) H frH F1 Z FIHH zat oH(f HF{F{ FJ=,Q H frl tn OEJH ooGl <PrcD H z a z o O - ztÄ Hd Fq <() l{\ lf\ I () r-'t O a z (J ü z H ts D E o () 14 ä E FIGUnE 2.3-/+ CONNECTING AREA, F(EAR
Hitachi 505, The the mode (r) (2) priority between signals is control buttons, that is; the same to the relation in rn t t L t t I t t t t I I Pot Set has the first PrioritY All the modes are divided into the groups' A group consists of FESET, COMzufE and HOLD' and another group consists of POI SET, A'LL FESET and FEP 0?' The operator should first add the FJSET sigrial when he wishes to change the computer mode from the second group tc the fincf. The output of the mode control signals are terminated on the same panel in the shapes of the pulse and the step firnction' Th
Hitachi 505, IN CONTROL CONSOT,E MODE CONTROL 51{IICHES INTEGFATOR AC POi\rER CA?ACITOR. $1ITCH TRANSFER S1^IITCH CONTROL ?ANET, ]N COM?IIII{G CONSOIE OUIPUT SEI,ECTOR FUNCTION S1'IITCHES AUDIBI,E ALAR4 CONTROL SI,IITCH UVEFJ,OAD ]NDICATOR i VOLTIETEN, RANCE S'IITCHES I I I I TIfiSE TRUNK LINES TERMINATE ON FEADOTN PANEL OC-151 FTGURE 2.3-T H]TACHI 505 CONTROL ANEA
Hitachi 505, Figure 2.2-5 illustrates the various positions of the computi-ng com- ponents in the 505 module area. This diagram illustrates which type of computing component is compatible with each cradle or module posi- tion. The procedure for replacing a compr-rter component and cha:rging the Pre-Patch Panel- patching block is described in the following Sub- Po rc orc nh c /1 '\ .-Ä ( C\ r4r4614lJrrp \!/ 4rrq \tu/. NOTE Failure to change the ?re-?atch Panel patching block may prevent proper use of a computer component du
Hitachi 505, r-t 7 :r !t a I I I :l 7 *l -l I I -r I -t I f -l !t *l :r APIENS]X /+ 3. yz/rco "oro 'ölö -x F rr'r .\, ,o +11 () -Ii\ @ F@. o@ I oo ono"oto 9 T0ö- __x2 - 100 COMPUTER DIAGR.AM PATCH]NG -X X2 100 SI4FXIF]ND DIAGzuM -x<0 DIAGRA}4 /". Jloö-m -X COMPUTER DIAGRAM J ioo [Kl -X PATCH]NG DIAGRJM S]MFT,IF]ED D]AGRAM -x<0 NOIE: IF THENE IS X =0, D]ODE APPLIED. ANY O?PORTÜJITY FEEDBACK SHOULD OF BE - tnq -
Hitachi 505, i. Readout Devices The problem solution obtained from the 505 nay be perrnanently recorded or temporarily displayed on various types of readout de- vices. A few of the more common readout deviees are described in this paragraph. Either the DVM or voltmeter may be used to read out the pncblem solution. These devices, however, do not record the solution and thus do not provide a pennanent record. trlhen in REp-op the computer solu- tion may be obtained by photographing the scope trace. x-y recorders or strip-chart recorflers may be use
: -- - j- -a: --5 -l -l -l -l -1 -l rJ 4't HITACHI ANALOG COM?UTER CO}ilIENIS I - INTN,ODUCTION II - THE HITACHI 505 COMPIIIEH, GENERAL DESCRITTION OF HIIACH] ?age 4 SECTION SECTION 1. 2 ö t/ t/+ 2T 21_ 21, u /ö 217 )"7 3/+ lQ l+2 l*7 OIER,AT ING C ONSIDERAT IONS a. ?relininary Operating Considerations b. ?re-Patch Panel Insertion and Removal c.
Hitachi 505, This feature perrnits the removal of the ?re-Patch ?anel to balance the operational amplifier' However' when the com- puter is switched from POT SET to any other mod'e ' the relay contact's open and the circuits as patched on the Pre-Patch Parre}providesthefeedbackloop.Mornentaryamplifieroverload. nay rezult during the relay operating time; thus to eHminate possibleerrorinthecomputersolutlon,theoperatorshouJd always sr^ritch the conputer FESET (depress the FESET
TER\.{INAI,S ilTrJ{" SHO'ütrD IF DITIIER SMOOTHII,IG Y XY BE CO)II]I'TED TOG]T]NF Td n1nl- _LD LU1 ,it,).) -.J1I . a -l -| -l -l -l -t -t -t _| -l -l -l I -| -t _t _t -| PATC}{ING A\D SIi"{FT,IFIED SilnilulÄTlC A1 - ,)L - MIJLTIPIIER obl o: 3;ga*o EM-151 NITI,f O,E,K XY F]GUAE 2.6_/U M]LT]FT'ICATTON
Hitachi 505, -r- I --r I F]GURE 2.1*-Z POTETMIOMETER SCHEMATIC SHOi^IING "i,-, TO EO R5LATIONSHIP FOR e1,r=lOO VOLTS LA (a) rtlrrmrrE toA,: DrAJ, sET AT 0.33 (u) tooK LOA-D: DIAL SET AT 0. elrr=+100V ,_- ain e1r=+100V -_r_ Rr it-A + -LL-U 11r t (a) rNFrNrrE LOAD: DIAL sET AT 0.833 . . Rl =2JK RZ=5K eo =100-i1r, R2 i-i n=i1.+i" i1n=is=3.33 ma. iL=O .'. eo =100-3.33(5)=83.3 VgLTS Fr --t -=0.833 (AS SET BY DIAI,) rt €o _ 93.3_ n e?? öi--- v.v/) " r_r1 l-00 ' R 1 € n R1 ei-n FIGURS 2,/
i-l :I -l -l :-l -l -l -l .-t -l -l -l .-l -t -I -t _t -t I the operator to select the outputs of the comparators (ordinally CPO through C?8). The two reference voltages are selected only by pushing the buttons designated 100 (red, for positive) or 100 (Utue, for negati-ve), nevertheless any button of the second, row depressed. The bu
Hitachi 505, Thepot.entioneternaybeusedinconjirnctionwithreferenceto obtain a fixed accurate voltage less than reference, or to nultiply a problen variable by any constant less than unity. Figure 2.4-L is a schenatic of a potentiometer with +100 volts applied to the higlt endtt, where K is; Pr K = '"t (EQ.2./+-1) R1 ThepotentiometershornrninFigrre2./+-5isrrrrloaded,arrdthe mechanical rat,io of R1:R1 equals the electrical ratio ee:ej3i thus, thepotentiometernaybesettotheexactrat.j-obyneansoftheca].i. brat
Hitachi 505, accurately'usethevoltrneterasanullmeterutilizingt'hereference potentiometer as a standard vol-tage dirider' b. 0verloäd Indicator OL'25I The overload indicators (Figur.e 2.3-L) provide a visual alarm when a' overload oecurs in arry of the otrnrational arnplifiers, i.e., when thesunmingjrrnctionisnotatvirtual.gr"orrnd.Anoverloadmaybedue to improper scaling, improper patching or loading' Whenthecomprrterisinitiallyturnedon,alltheindicatorlamps rnaylight;howeverrinafewseconds'astheanplifierssettle'a1lthe lamps should go
Hitachi 505, (The potentiometer output), than to cal-culate a corrected mechanical ratio (nf :nt,). Figure 2./+-4 illustrates the 5o5 cj-rcu|try provided to pennit sett- ing the potentiometers under actual 1oad. Relay Kl is energized vhen the conput,er is placed in the pot set node (depress POT SE"I button) and applies +lOO volts reference to the high ends of all the grounded poten- tj-ometers. Note that the wiper remai-ns eorurected to the ?re-Patch Panel termi-nation; thus, the r^riper nfeelsil the impedance of the
I APFENDIX 1 COMPINER SY}4BOLS r\ -J \- nrcH GA1N aMrxrFrER DroDE FUNCTTSN 6ENERAT9R' \ ,/ (oruntrroxAt A]4PLIFmR) L---J FIGD AND vARTaBLE ]NVEN,TING AMPLIF]ER -r---} -----€- FUNCTION S/'IITCH ol SU}IVIING A]4PT,IFER -----}|-- SoLrD_grATE DIoDE I}üTEGRAT ING A}4PL IFIER _--AAA - FI)GD NESISIOR AIND-SETPOtENTIOMETER, rr CAPACIIOR -\ I- GROUNDED ---
Hitachi 505, The potentiometer having a l-ower n:mber has priority. trihen two buttons are pushed, the lower numbered potentioineter r^r111 be selected. 5. OIERATIONAL AMFT,IFIER a. General Consi-derations I,lhen a high-gain d-c arnplifier is used in conjunction with input a3d feedback networks to perforrn mathematical operations, the resu-lt- ing systen is generally referred to as an operational amplfier. The operational amplifier is the basic and most versatile unit in t
Hitachi 505, r-l t--'t F-I h ii 7 ;l r| rF 1r I Tr I 7 :3 ir ir \ L I I t_ .|-t- APIENDIX ? The fol]owing Table contains examples of amprifier circuits for sirnul-ating transfer functions. A more complete listing may be found in Jackson, A.S.: trAnalog Conputationil, McGraw- Hill Book Company, Inc., New York, 1!60 N0. BODE FT,OT TRANSFER IUNCTTON T]},ts CONSTA}IIS GAINS I U 1 I 1 -tft -L' 1 " --;- 'l m ! 0 K X 'l rT v T I -A K -A K .l n B=AI( 1 K- v I-+ T l. . --;- n _1 T B=
Hitachi 505, I I I is solved, reset, and then solved again' this process continues re- petitively at the pre-set rate' The problem solution may be displayed onanoscilloscopethatissynchronizedwiththeRep-O?cyclingrate. TheinptrtstotheOscilloscopeareter:ninatedontheReadoi.:.tPa:re10C- To place the computer in the Rep-Op mode the operator sets the desiredrateonthetjmerortheOscilloscopeTimeBase.Af-bersett- ing the desired repetition rat'e' the computer is switched int
Hitachi 505, SUMMARY OF PATCHING FOR INTEGRATOR IN-151 5. TYPICAI CONNECTION AROUND ]N-151 F -t -r -t -t -l -t -l -I -t -l -l -t -1 -1 -t -I -t -t TI{E ?ATCHING SHC'I{S TWO ORDINARY INIEGRATORS HAVING Ttfr CIICUITS BELCIvI. 1 1 I 10 10 ]N FEP OP MODE I}IIEC'RATING GAIN E MIJLTTPLIED BY 1OO. 't J 1 1 10 10 DUAI DC A}'IPLIFIER oo n+i--l tuJ' I clt) QV{\TN' o FT_151 IT2-l o DA-151 o o rN-151 -55-
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