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Fujitsu MB39A104 Datasheet

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Fujitsu MB39A104 User Manual
Fujitsu MB39A104 User Guide
Fujitsu MB39A104 Online Manual

Text of Fujitsu MB39A104 User Guide:

  • Fujitsu MB39A104, MB39A104 7 (Continued) (VCC = VCCO = 12 V, VREF = 0 mA, Ta = +25 °C) *: Standard design value. Parameter Symbol Pin No. Conditions Value Unit Min Typ Max 7.Error amplifier block [Error Amp1, Error Amp2] Frequency bandwidth BW 9, 16 A V = 0 dB ⎯ 1.6* ⎯ MHz Output voltage V OH 9, 16 ⎯ 4.7 4.9 ⎯ V V OL 9, 16 ⎯⎯40 200 mV Output source current I SOURCE 9, 16 FB1 = FB2 = 2 V ⎯−2 −1mA Output sink current I SINK 9, 16 FB1 = FB2 = 2 V 150 200 ⎯µA 8.PWM comparator block [PWM Comp.1, PWM Comp.2] Threshold voltage V T0 6, 19 Duty cycle = 0 % 1.4 1.5 ⎯ V V T100 6, 19 Duty cycle = Dtr ⎯

  • Fujitsu MB39A104, MB39A104 27 Example: CH1 CH2 Inductance values derived from the above formulas are values that provide sufficient margin for continuous operation at maximum load current, but at which continuous operation is not possible at light loads. It is therefore necessary to determine the load level at which continuous operation becomes possible. In this application, the Sumida CDRH104R-150 is used. At 15 µH, the load current value under continuous operating conditions is determined by the following formula. Load current v

  • Fujitsu MB39A104, MB39A104 19 2. Setting Time Constant for Timer-Latch Short-Circuit Protection Circuit Each channel uses the short-circuit detection comparator (SCP Comp.) to always compare the error amplifier′s output level to the reference voltage (3.1 V Typ). While DC/DC converter load conditions are stable on all channels, the short-circuit detection comparator output remains at “L” level, and the CSCP terminal (pin 8) is held at “L” level. If the load condition on a channel changes rapidly due to a short-circuit of the load, causing the output voltage to drop, the outpu

  • Fujitsu MB39A104, MB39A104 22 ■ APPLICATION EXAMPLE A B B A R10R11 C12 1000 pF C14 1000 pF C21 1000 pF R15R16 R13 R8 VIN (7 V to 19 V) C1 100 pF R5 Q2 L2 VO2 (3.3 V) D2 R4 Q1 L1 VO1 (5.0 V) D1 + ++ + + + + + + + + + + + + + 10 VREF VREF 11 9 6 15 14 16 19 8 CS1 FB1 DTC1 CS2 FB2 DTC2 CSCP 12 13 1817 RT CT GNDVREF 24 7 23 2 20 21 22 5 4 3 1 CTL VCC GNDO VH ILIM2 VS2 OUT2 ILIM1 VS1 OUT1 VCCO 1.24 V 1.24 V 3.1 V SCP Comp. SCP Logic UVLO OSC VREF Bias Voltage Current Protection Logic Current Protection Logic I O = 200 mA at VCCO = 12 V IO = 200 mA at VCCO = 12 V VR1 VH 1.24 V 2.5 V 1.5 V 5.0 V bias Power ON/OFF CTL P-ch Drive2 P-ch Drive1 PWM Comp.1

  • Fujitsu MB39A104, MB39A104 36 ■ MB39A104PFV-❏❏❏E1 RECOMMENDED CONDITIONS OF MOISTURE SENSITIVITY LEVEL [Temperature Profile for FJ Standard IR Reflow] (1) IR (infrared reflow) (2) Manual soldering (partial heating method) Conditions : Temperature 400 °C Max Times : 5 s max/pin Item Condition Mounting Method IR (infrared reflow) , Manual soldering (partial heating method) Mounting times 2 times Storage period Before opening Please use it within two years after Manufacture. From opening to the 2nd reflow Less than 8 days When the storage period after ope

  • Fujitsu MB39A104, DS04-27231-5Ea FUJITSU MICROELECTRONICS DATA SHEET Copyright©2002-2008 FUJITSU MICROELECTRONICS LIMITED All rights reserved 2006.8 ASSP For Power Management Applications (General Purpose DC/DC Converter) 2-ch DC/DC Converter IC with Overcurrent Protection MB39A104 ■ DESCRIPTION The MB39A104 is a 2-channel DC/DC converter IC using pulse width modulation (PWM), incorporating an overcurrent protection circuit (requiring no current sense resistor). This IC is ideal for down conversion. Operating at high frequency reduces the v

  • Fujitsu MB39A104, MB39A104 25 The above power dissipation figures for the TPC8102 are satisfied with ample margin at 2.4 W (Ta = +25 °C) . CH2 Input voltage VIN (Max) = 19 V output voltage VO = 3.3 V, drain current ID = 3 A, Oscillation frequency f OSC = 500 kHz, L = 15 µH, drain-source on resistance RDS (ON) := 50 mΩ, tr = tf := 100 ns. Drain current (Max) : I D (Max) Drain current (Min) : I D (Min) P C = ID 2 × RDS (ON) × Duty = 3 2 × 0.05 × 0.263 := 0.118 W PS ( ON) = V D (Max) × ID × tr × fOSC 6 = 19 ×

  • Fujitsu MB39A104, MB39A104 23 ■ PARTS LIST Note : TOSHIBA : TOSHIBA Corporation ROHM : ROHM Co., Ltd SANYO : SANYO Electric Co., Ltd. TDK : TDK Corporation SUMIDA : SUMIDA Electric Co., Ltd. ssm : SUSUMU Co., Ltd. COMPONENT ITEM SPECIFICATION VENDOR PARTS No. Q1, Q2 P-ch FET VDS = −30 V, ID = −6 A TOSHIBA TPC8102 D1, D2 Diode VF = 0.42 V (Max) , at IF = 3 A ROHM RB0530L-30 L1, L2 Inductor 15 µH 3.6 A, 50 mΩ SUMIDA CDRH104R-150 C1 C2, C6 C3, C7 C4, C8 C10, C11, C20 C12, C14, C21 C16, C17 Ceramics Condenser OS-CON TM Ceramics Condenser OS-CON TM Ceramics Condenser Ceramics Condenser Ceramics Condenser 100 pF 10 µF 10 µF 82 µF 0.1 µF 1000 pF 0.1 µF 50 V 20 V 25 V 6.3 V 50

  • MB39A104 12 2. Control Function When CTL terminal (pin 24) is “L” level, IC becomes the standby mode. The power supply current is 10 µA (Max) at the standby mode. On/Off Setting Conditions 3. Protective Functions (1) Timer-latch overcurrent protection circuit block (OCP) The timer-latch overcurrent protection circuit is actuated upon completion of the soft-start period. When an overcurren

  • Fujitsu MB39A104, MB39A104 20 ■ TREATMENT WITHOUT USING CSCP TERMINAL When not using the timer-latch short-circuit protection circuit, connect the CSCP terminal (pin 8) to GND with the shortest distance. ■ RESETTING THE LATCH OF EACH PROTECTION CIRCUIT When the overcurrent, or short-circuit protection circuit detects each abnormality, it sets the latch to fix the output at the "L" level. To reset the actuated protection circuit, either the power supply turn off and on again or set the CTL terminal (pin 24) to the "L" level to lower the VREF terminal (pin 17) voltage to 2.4 V (Min) or less. 8 CSCP 18 GND • Treatment without using CSCP

  • Fujitsu MB39A104, MB39A104 37 ■ PACKAGE DIMENSION 24-pin plastic SSOP Lead pitch 0.65 mm Package width × package length 5.6 × 7.75 mm Lead shape Gullwing Sealing method Plastic mold Mounting height 1.45 mm MAX Weight 0.12 g Code (Reference) P-SSOP24-5.6×7.75-0.65 24-pin plastic SSOP (FPT-24P-M03) (FPT-24P-M03) C 2003 FUJITSU LIMITED F24018S-c-4-5 7.75±0.10(.305±.004) 5.60±0.10 7.60±0.20 (.220±.004) (.299±.008) * 1 * 2 0.10(.004) 112 1324 0.65(.026) –0.07 +0.08 0.24 .009 +.003 –.003 M 0.13(.005) INDEX 0.17±0.03 (.007±.001) "A" 0.25(.010) 0.10±0.10 (.004±.004) (Stand off) Details of "A" part (Mounting height) 1.25 +0.20 –0.10 –.004 +.008 .049 0~8 ˚ 0.50±0.

  • Fujitsu MB39A104, MB39A104 34 ■ USAGE PRECAUTIONS • Printed circuit board ground lines should be set up with consideration for common impedance. • Take appropriate static electricity measures. • Containers for semiconductor materials should have anti-static protection or be made of conductive material. • After mounting, printed circuit boards should be stored and shipped in conductive bags or containers. • Work platforms, tools, and instruments should be properly grounded. • Working personnel should be grounded with resistance of 250 kΩ to 1 MΩ between body and ground. • Do not apply negative voltages. • The use of negative volta

  • Fujitsu MB39A104, MB39A104 16 ■ TREATMENT WITHOUT USING CS TERMINAL When not using the soft-start function, open the CS1 terminal (pin 11) and the CS2 terminal (pin 14) . 11 CS1 14 CS2 “OPEN” “OPEN” • Without Setting Soft-Start Time

  • MB39A104 24 ■ SELECTION OF COMPONENTS • P-ch MOS FET The P-ch MOSFET for switching use should be rated for at least 20% more than the maximum input voltage. To minimize continuity loss, use a FET with low R DS(ON) between the drain and source. For high input voltage and high frequency operation, on/off-cycle switching loss will be higher so that power dissipatio

  • Fujitsu MB39A104, MB39A104 5 ■ ABSOLUTE MAXIMUM RATINGS * : The packages are mounted on the epoxy board (10 cm × 10 cm). WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. ■ RECOMMENDED OPERATING CONDITIONS * : Refer to“ ■ SETTING THE TRIANGULAR OSCILLATION FREQUENCY”. WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warran

  • Fujitsu MB39A104, MB39A104 18 Overcurrent Protection Circuit: Range of Operation When an overcurrent flow occurs, if the increased voltage between the drain and source of the FET is detected by means of the external FET (Q1) resistor, operational stability is lost when the external FET (Q1) ON interval determined by the oscillation frequency, input voltage, and output voltage falls below 450 ns. Therefore, the circuit should be used within a range that ensures that the ON interval does not fall below 450ns, according to the following formula. If the ON interval of the external FET (Q1) is below 450ns, we recommend the use

  • Fujitsu MB39A104, MB39A104 4 ■ BLOCK DIAGRAM + + + + + + + + + + + + 10 VREF VREF 11 9 6 15 14 16 19 8 CS1 FB1 DTC1 CS2 FB2 DTC2 CSCP 12 13 1817 RT CT GNDVREF 24 7 23 2 20 21 22 5 4 3 1 CTL VCC GNDO VH ILIM2 VS2 OUT2 ILIM1 VS1 OUT1 VCCO 1.24 V 1.24 V (3.1 V) SCP Comp. SCP Logic UVLO OSC VREF Bias Voltage Current Protection Logic Current Protection Logic I O = 200 mA at VCCO = 12 V IO = 200 mA at VCCO = 12 V VR1 VH 1.24 V 2.5 V 1.5 V 5.0 V bias Power ON/OFF CTL P-ch Drive2 P-ch Drive1 PWM Comp.1 PWM Comp.2 Error Amp2 Error Amp1 CH1 CH2 −INE1 −INE2 10 µA V CC − 5 V 10 µA L priority L priority L priority L priority H priority H: at SCP H:UVLO release Accura

  • Fujitsu MB39A104, MB39A104 13 ■ SETTING THE OUTPUT VOLTAGE ■ SETTING THE TRIANGULAR OSCILLATION FREQUENCY The triangular oscillation frequency is determined by the timing capacitor (CT) connected to the CT terminal (pin 13), and the timing resistor (R T) connected to the RT terminal (pin 12). Moreover, it shifts more greatly than the calculated values according to the constant of timing resistor (R T) when the triangular wave oscillation frequency exceeds 1 MHz. Therefore, set it referring to “Triangular Wave Oscillation Frequency vs. Timing Resistor” and “Triangular Wave Oscillation Frequency vs. Timing Capacitor” in “■ TYPICA

  • Fujitsu MB39A104, MB39A104 10 (Continued) − + + + 10 (15) 11 (14) 9 (16) IN OUT Error Amp1 (Error Amp2) 1 µF 1.24 V 10 kΩ 2.4 kΩ 240 kΩ 10 kΩ 40 30 20 10 0 −10 −20 −30 −40 180 90 0 −90 −180 100 1 k 10 k 100 k 1 M 10 M Ta = +25 °C VCC = 12 V A V ϕ 1000 800 600 400 200 0 740 −40 −20 0 +20 +40 +60 +80 +100 Error Amplifier, Gain, Phase vs. Frequency Gain AV (dB) Phase φ (deg) Frequency f (Hz) Power Dissipation vs. Ambient Temperature Power dissipation PD (mW) Ambient temperature Ta ( °C)

  • MB39A104 35 ■ LABELING SAMPLE (LEAD FREE VERSION) 2006/03/01 ASSEMBLED IN JAPAN G QC PASS (3N) 1MB123456P-789-GE1 1000 (3N)2 1561190005 107210 1,000 PCS 0605 - Z01A 1000 1/1 1561190005 MB123456P - 789 - GE1 MB123456P - 789 - GE1 MB123456P - 789 - GE1 Pb Lead Free version lead-free mark JEITA logo JEDEC logo

  • MB39A104 3 ■ PIN DESCRIPTION Pin No. Symbol I/O Descriptions 1 VCCO ⎯ Output circuit power supply terminal (Connect to same potential as VCC pin) 2 VH O Power supply terminal for FET drive circuit (VH = V CC − 5 V) 3 OUT1 O External P-ch MOS FET gate drive terminal 4 VS1 I Overcurrent protection circuit input terminal 5ILIM1I Overcurrent protection circuit detection res

  • Fujitsu MB39A104, MB39A104 11 ■ FUNCTIONS 1. DC/DC Converter Functions (1) Reference voltage block (REF) The reference voltage circuit generates a temperature-compensated reference voltage (5.0 V Typ) from the voltage supplied from the VCC terminal (pin 7). The voltage is used as the reference voltage for the IC’s internal circuitry. The reference voltage can supply a load current of up to 1 mA to an external device through the VREF terminal (pin 17). (2) Triangular-wave oscillator block (OSC) The triangular wave oscillator incorporates a timing capacitor and a timing resistor connected respectively to the CT ter

  • Fujitsu MB39A104, MB39A104 9 (Continued) Ta = +25 °C VCC = 12 V CTL = 5 V CT = 39 pF 10000 1000 100 10 CT = 100 pF CT = 220 pF CT = 560 pF 1 10 100 1000 Ta = +25 °C VCC = 12 V CTL = 5 V RT = 11 kΩ 10000 1000 100 10 RT = 24 kΩ RT = 68 kΩ RT = 130 kΩ 10 100 1000 1000 0 Ta = +25 °C VCC = 12 V CTL = 5 V R T = 47 kΩ 3.2 3.0 2.8 2.6 2.4 2.2 2.0 1.8 1.6 1.4 1.2 0 200 400 600 800 1000 1200 16001400 VCC = 12 V CTL = 5 V R T = 24 kΩ CT = 100 pF 3.2 3.0 2.8 2.6 2.4 2.2 2.0 1.8 1.6 1.4 1.2 −40 −20 0 +20 +40 +60 +80 +100 VCC = 12 V CTL = 5 V R T = 24 kΩ CT = 100 pF 560 540 520 500 480 460 440 −40 −20 0 +20 +40 +60 +80 +100 Triangular Wave Upper and Lower Limit Voltage vs. Ambient

  • Fujitsu MB39A104, MB39A104 8 ■ TYPICAL CHARACTERISTICS (Continued) Ta = +25 °C CTL = 5 V 10 8 6 4 2 0 0 5 10 15 20 Ta = +25 °C CTL = 5 V VREF = 0 mA 10 8 6 4 2 0 0 5 10 15 20 Ta = +25 °C VCC = 12 V CTL = 5 V 10 8 6 4 2 0 0 5 10 15 20 25 30 35 VCC = 12 V CTL = 5 V VREF = 0 mA 2.0 1.5 1.0 0.5 0.0 −0.5 −1.0 −1.5 −2.0 −40 −20 0 +20 +40 +60 +80 +100 Ta = +25 °C VCC = 12 V VREF = 0 mA 500 400 300 200 100 0 10 9 8 7 6 5 4 3 2 1 0 0 5 10 15 20 ICTL VREF Power supply current ICC (mA) Reference voltage V REF (V) Power Supply Current vs. Power Supply Voltage Reference Voltage vs. Power Supply Voltage Power supply voltage VCC (V) Power supply voltage VCC (V) Reference Vol

  • Fujitsu MB39A104, MB39A104 17 ■ ABOUT TIMER-LATCH PROTECTION CIRCUIT 1. Setting Timer-Latch Overcurrent Protection Detection Current The overcurrent protection circuit is actuated upon completion of the soft-start period. When an overcurrent flows, the circuit detects the increase in the voltage between the FET’s drain and source using the external FET ON resistor (R ON), actuates the timer circuit, and starts charging the capacitor CSCP connected to the CSCP terminal (pin 8). If the overcurrent remains flowing beyond the predetermined period of time, the circuit sets the latc

  • Fujitsu MB39A104, MB39A104 6 ■ ELECTRICAL CHARACTERISTICS (VCC = VCCO = 12 V, VREF = 0 mA, Ta = +25 °C) (Continued) Parameter Symbol Pin No Conditions Value Unit Min Typ Max 1.Reference voltage block [REF] Output voltage VREF 17 Ta = +25 °C 4.95 5.00 5.05 V Output voltage temperature variation ∆V REF/ V REF 17 Ta = 0 °C to +85 °C ⎯ 0.5* ⎯% Input stability Line 17 VCC = 7 V to 19 V ⎯ 310mV Load stability Load 17 VREF = 0 mA to −1 mA ⎯ 110mV Short-circuit output current I OS 17 VREF = 1 V −50 −25 −12 mA 2.Under

  • Fujitsu MB39A104, MB39A104 28 To determine whether the current through the inductor is within rated values, it is necessary to determine the peak value of the ripple current as well as the peak-to-peak values of the ripple current that affect the output ripple voltage. The peak value and peak-to-peak value of the ripple current can be determined by the following formulas. Peak value : I L Peak-to-peak value : ∆IL Example: Using the CDRH104R-150 15 µH (allowable tolerance ±30%) , rated current = 3.6 A Peak value: CH1 CH2 Peak-to-peak value: CH1 CH2 I L ≥ IO + V IN − VO ton

  • Fujitsu MB39A104, MB39A104 26 The above power dissipation figures for the TPC8102 are satisfied with ample margin at 2.4 W (Ta = +25 °C) . • Inductors In selecting inductors, it is of course essential not to apply more current than the rated capacity of the inductor, but also to note that the lower limit for ripple current is a critical point that if reached will cause discontinuous operation and a considerable drop in efficiency. This can be prevented by choosing a higher inductance value, which will enable continuous operation under light loads. Note that if the inductance value is too high, however, direct current resistance (DCR) is increased a

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