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Hitachi BladeSymphony 1000 Operation & User’s Manual

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Hitachi BladeSymphony 1000 User Manual
Hitachi BladeSymphony 1000 User Guide
Hitachi BladeSymphony 1000 Online Manual

Text of Hitachi BladeSymphony 1000 User Guide:

  • Hitachi BladeSymphony 1000, www.hitachi.com BladeSymphony 1000 Architecture White Paper 17 • Full interleave mode (or SMP mode) — Intended for use with an OS without support for the NUMA architecture or with inadequate support for NUMA. In full interleave mode, main memory is interleaved between CPU modules in units. Since memory accesses do not concentrate on one CPU module in full interleave mode, memory bus bottlenecks are less likely and latency is averaged across CPUs. • Non-interleave mode — This mode specifies the ratio of local mem

  • Hitachi BladeSymphony 1000, www.hitachi.com BladeSymphony 1000 Architecture White Paper 39 Chapter 6 Reliability and Serviceability Features Reliability, availability, and serviceability are key requirements for platforms running business-critical application services. In today’s globally competitive environment, where users access applications round-the-clock, downtime is unacceptable and can result in lost customers, revenue, and reputation. The BladeSymphony 1000 is designed with a number of features intended to increase the uptime of the system. Reliability Features Intended to execute core business operatio

  • www.hitachi.com BladeSymphony 1000 Architecture White Paper 25 If an uncorrectable error occurs in a DIMM in the primary, the mirror is used for both writing and reading data. If an uncorrectable error occurs in a DIMM in the mirror, the primary is used for both writing and reading data. In this case, the error is logged as a correctable error. If the error is uncorrect

  • Hitachi BladeSymphony 1000, www.hitachi.com BladeSymphony 1000 Architecture White Paper 15 Figure 6. Hitachi Node Controller connects multiple server blades By dividing the SMP system across several server blades, the memory bus contention problem is solved by virtue of the distributed design. A processor’s access to its on-board memory incurs no penalty. The two processors (four cores) can access up to 64 GB at the full speed of local memory. When a processor needs data that is not contained in its locally attached memory, its node controller needs

  • www.hitachi.com BladeSymphony 1000 Architecture White Paper 37 Module Connections Chassis A can have up to eight server blades mounted, with two PCI-X slots per server blade. Storage modules cannot be mounted on these chassis. Chassis B can have three types of I/O modules mounted. If a PCI-X I/O Module is installed, the chassis can have up to four server b

  • Hitachi BladeSymphony 1000, www.hitachi.com BladeSymphony 1000 Architecture White Paper 3 Chapter 1 Introduction Executive Summary Blade servers pack more compute power into a smaller space than traditional rack-mounted servers. This capability makes them an attractive alternative for consolidating servers, balancing or optimizing data center workloads, or simply running a wide range of applications at the edge or the Web tier. However, concerns about the reliability, scalability, power consumption, and versatility of conventional blade

  • www.hitachi.com BladeSymphony 1000 Architecture White Paper 29 Figure 20. Embedded Fibre Channel Switch Module block diagram The Embedded Fibre Channel Switch Module is configured with three components: A Brocade Fibre Channel switch, Fibre Channel HBAs, and network adapters. Directly connecting the HBAs to the FC switch in this manner, rather than installing them as PCI cards in the

  • Hitachi BladeSymphony 1000, www.hitachi.com BladeSymphony 1000 Architecture White Paper 49 And the host intervention code is tuned for the latest Itanium hardware features, minimizing the performance impact to guests. Virtage offers two modes in which processor resources can be distributed among the different logical partitions: dedicated mode and shared mode, as illustrated in Figure 31. Figure 31. Share or isolate CPU and I/O resources to any partition in the same environment Dedicated Mode Individual processor cores can be assigned to a specific logical partition. Dedicating the core to an LPAR helps

  • Hitachi BladeSymphony 1000, www.hitachi.com BladeSymphony 1000 Architecture White Paper 51 Chapter 10 Summary In the past, inadequate scalability, compromises in I/O and other capabilities, excessive heat generation, and increased complexity in blade environments caused many data center managers to shy away from using blade servers for enterprise applications. BladeSymphony 1000 overcomes these issues, proving a blade solutions that delivers server consolidation, centralized administration, reduced cabling, and simplified configuration. For companies seeking to lower cost and complexity with blade servers, BladeSymphony 1000 offers a unique solution with: • A 10 RU chassis with hot swappable server blades th

  • Hitachi BladeSymphony 1000, www.hitachi.com BladeSymphony 1000 Architecture White Paper 33 Embedded Gigabit Ethernet Switch The Embedded Gigabit Ethernet Switch is contained in the Switch & Management Module and is a managed, standards-based Layer 2 switch that provides gigabit networking through cableless LAN connections. The switch provides 12 (single) or 24 (redundant) gigabit Ethernet ports for connecting BladeSymphony 1000 Server Blades to other networked resources within the corporate networking structure. Eight of the ports connect through the backplane to server blades, an

  • 42 BladeSymphony 1000 Architecture White Paper www.hitachi.com • Panel control • Log information management within BladeSymphony 1000 (RC logs, SEL, SVP logs, etc.). • SVP hot standby configuration control • Server Conductor (server management software) interaction function. (Including a function for emulating the PCI-version SVP function.) • HA mo

  • 32 BladeSymphony 1000 Architecture White Paper www.hitachi.com The Hitachi FC Controller FC-HBA supports the functions in Table 8. Management Software Developed exclusively for BladeSymphony 1000, the BladeSymphony management software manages all of the hardware components of BladeSymphony 1000 in a unified manner, including the Embedded Fibre Channel Switch Module. In addition, Brocade

  • Hitachi BladeSymphony 1000, 14 BladeSymphony 1000 Architecture White Paper www.hitachi.com • ECC — The ECC can correct an error in consecutive four bits in any four DIMM set (i.e., a fault in one DRAM device). This function is equivalent to technology generally referred to as Chipkill and allows the contents of memory to be reconstructed even if one chip completely fails. The concept is similar to the way RAID protects content on disk drives. • Memory device replacing function — The NDC and MC have a function to replace a faulty DRAM device with a normal spare

  • Hitachi BladeSymphony 1000, 48 BladeSymphony 1000 Architecture White Paper www.hitachi.com Chapter 9 Virtage Virtage is a key technical differentiator for BladeSymphony 1000. It brings mainframe-class virtualization to blade computing. Leveraging Hitachi’s decades of development work on mainframe virtualization technology, Virtage delivers high-performance, extremely reliable, and transparent virtualization for Dual-Core Intel Itanium and Quad-Core Intel Xeon processor-based server blades. Virtage is built-in and requi

  • Hitachi BladeSymphony 1000, www.hitachi.com BladeSymphony 1000 Architecture White Paper 47 – Setting a failover schedule for cluster groups, based on specific dates or at specified times on a weekly schedule. The user can achieve more detailed cluster management by combining this feature with a power control schedule. – Using alerts to predict future server shutdown and implementing automatic failover in the event of specific alerts • Power Scheduling — Power control schedules can be set to turn the power on or off on specific dates

  • Hitachi BladeSymphony 1000, 12 BladeSymphony 1000 Architecture White Paper www.hitachi.com Enhanced Machine Check Architecture provides extensive error detection and address/data path correction capabilities, as well as system-wide ECC protection. It detects bit-level errors and manages data corruption, thereby providing better reliability and uptime. Intel VT Virtualization Technology The Dual-Core Intel Itanium processor includes hardware-assisted virtualization support that helps increase virtualization efficiency and broaden operating system compatibility. Intel Virtualization Technology (Intel VT) enables one hardware platform to

  • Hitachi BladeSymphony 1000, 36 BladeSymphony 1000 Architecture White Paper www.hitachi.com Chapter 7 Chassis, Power, and Cooling The BladeSymphony 1000 chassis houses all of the modules previously discussed, as well as a passive backplane, Power Supply Modules, Cooling Fan Modules, and the Switch & Management Modules. The chassis and backplane provide a number of redundancy features including a one-to-one relationship between server blades and I/O modules, as well as duplicate paths to I/O and switches. In addition, although the backplane is the only single point of failure in the BladeSymphony 1000, it

  • Hitachi BladeSymphony 1000, 8 BladeSymphony 1000 Architecture White Paper www.hitachi.com Chapter 3 Intel Itanium Server Blade The BladeSymphony 1000 can support up to eight blades for a total of up to 16 Itanium CPU sockets, or 32 cores, running Microsoft Windows or Linux. Up to four Intel Itanium Server Blades can be connected via the high-speed backplane to form a high-performance SMP server of up to 16 cores. Each Intel Itanium Server Blade, illustrated in Figure 4, includes 16 DDR2 main memory slots. Using 4 GB DIMMs, this equates to 64 GB per server blade (16 GB per core) or 256 GB in a 16 core SMP configuration, making it an ideal can

  • Hitachi BladeSymphony 1000, 40 BladeSymphony 1000 Architecture White Paper www.hitachi.com Serviceability Features Switch & Management Module The Switch & Management Module is designed to control the system unit and monitor the environment. Figure 28 shows the block diagram of the module. This module and other system components are connected through I2C or other busses. Figure 28. Switch & Management Module components The Switch & Management Module contains the service processor (SVP) which controls the system and monitors the environment. A SVP is connected to the server blades or another SVP on

  • Hitachi BladeSymphony 1000, 50 BladeSymphony 1000 Architecture White Paper www.hitachi.com Fiber Channel Virtualization Hitachi also offers Fibre Channel I/O virtualization for Virtage. This allows multiple logical partitions to access a storage device through a single Fiber Channel card, allowing fewer physical connections between server and storage and increasing the utilization rates of the storage connections. This is exclusive to the 4 GB Hitachi FC card. Shared/Virtual NIC Functions Virtage also provides a virtual NIC (VNIC) function, which constructs a virtual network between LPARs and enables communication between LPARs without a physical NIC. There ar

  • Hitachi BladeSymphony 1000, 44 BladeSymphony 1000 Architecture White Paper www.hitachi.com SVP Console This function is shared between the Intel Itanium and Intel Xeon Server Blades. SVP console is a console under SVP, and provides a user interface for system management. SVP console provides the following functions: • Setup and display of the system's hardware information • Display and deletion of failure information (RC and detail logs) • Substitution of front panel operation • Display of console logs • Setting of remote failure reporting • Update of System Firmware (normally using the EFI tool) [Under study for the IA32 CPU module.] • Setting of the SVP clock • Debuggi

  • Hitachi BladeSymphony 1000, www.hitachi.com BladeSymphony 1000 Architecture White Paper 13 Baseboard Management Controller The Baseboard Management Controller (BMC) is the main controller for Intelligent Platform Management Interface (IPMI), a common interface to hardware and firmware used to monitor system health and manage the system. The BMC manages the interface between system management software and the hardware in the server blade. It is connected to the service processor (SVP) inside the Switch & Management Module. The BMC and SVP cooperate with each other to control and monitor the entire system. Sensors built into the system report to the BMC on different parameters such as te

  • Hitachi BladeSymphony 1000, www.hitachi.com BladeSymphony 1000 Architecture White Paper 45 Chapter 8 Management Software BladeSymphony 1000 delivers an exceptional range of choices and enterprise-class versatility with multi-OS support and comprehensive management software options. Operating System Support With support for Microsoft Windows and Red Hat Linux Enterprise, BladeSymphony 1000 gives companies the option of running two of the most popular operating systems — at the same time and in the same chassis for multiple applications.

  • Hitachi BladeSymphony 1000, 38 BladeSymphony 1000 Architecture White Paper www.hitachi.com power redundancy, it boots the system after issuing a warning by illuminating the Warning LED. Hot swapping is not possible in the absence of redundant power. Redundant Cooling Fan Modules The Cooling Fan Modules cool the system with variable speed fans, and are installed redundantly, as illustrated in Figure 27. The fans cool the system by pulling air from the front of the chassis to the back. The modules can be hot-plugged, enabling a failed Cooling Fan Module to be rep

  • Hitachi BladeSymphony 1000, 6 BladeSymphony 1000 Architecture White Paper www.hitachi.com Chapter 2 System Architecture Overview BladeSymphony 1000 features a very modular design to maximize flexibility and reliability. System elements are redundant and hot-swappable so the system can be easily expanded without downtime or unnecessary disruption to service levels. The key components of the system, illustrated in Figure 2, consist of: • Server Blades — Up to eight depending on module, available with Intel Xeon or Itanium processors • Storage Modules — up to two modules supporting either three o

  • Hitachi BladeSymphony 1000, 20 BladeSymphony 1000 Architecture White Paper www.hitachi.com Chapter 4 Intel Xeon Server Blade The eight slot BladeSymphony 1000 can accommodate a total of up to eight Dual-Socket, Dual-Core or Quad-Core Intel Xeon Server Blades for up to 64 cores per system. Each Intel Xeon Server Blade supports up to four PCI slots, and provides the option of adding Fibre Channel or SCSI storage. Two on-board gigabit Ethernet ports are also provided, along with IP KVM for remote access, virtual media support, and fron

  • Hitachi BladeSymphony 1000, 22 BladeSymphony 1000 Architecture White Paper www.hitachi.com • Intel VT Flex Migration — Intel hardware-assisted virtualization provides the ability to perform live virtual machine migration to enable fail-over, load balancing, disaster recovery, and real-time server maintenance. • New features include Error Correcting Code (ECC) system bus, new memory mirroring, and I/O hot- plug Intel Xeon 5400 Quad Core Processors The Quad-Core Intel Xeon 5400 Series is designed for mainstream, new business, and HPC servers, delivering increased performance, energy efficiency, and the ability to run applicatio

  • Hitachi BladeSymphony 1000, www.hitachi.com BladeSymphony 1000 Architecture White Paper 5 • Reliability — Reliability is increases through redundant components and components are hot- swappable. Other reliability features include: – Hitachi’s mainframe-class memory management – Redundant switch and management modules – Extremely reliable backplane and I/O – Multi-configurable power supplies for N+1 or full redundancy options – Failover protection following the N+M model — there are “M” backup servers for every “N” active servers, so failover is cascading – In the event of hardware failure, the system automatically detects the fau

  • Hitachi BladeSymphony 1000, 10 BladeSymphony 1000 Architecture White Paper www.hitachi.com Intel Itanium Processor 9100 Series The Dual-Core Intel Itanium 9100 series 64-bit processor delivers scalable performance with two high- performance cores per processor, memory addressability up to 1024 TB, 24 MB of on-die cache, and a 667 MHz front-side bus. It also includes multi-threading capability (two threads per core) and support for virtualization in the silicon. Explicitly Parallel Instruction Computing (EPIC) technology is designed to enable parallel throughput on a enormous scale, with up to six instructions per clock cycle, large execution

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