4DSP FC6301 Operation & User’s Manual

Text of 4DSP FC6301 User Guide:

• 4DSP FC6301, UM027 FC6301 User Manual r1.3 UM027 www.4dsp.com - 19 - 4.7 BLAST sites Thanks to the availability of 3 BLAST sites a wide variety of memory and processing modules can be connected to the Virtex-6 device. For each BLAST site it is possible to choose from the list of available BLAST modules. For more information about the available BLASTs on the FC6301 please consult the following page: BLAST modules http://www.4dsp.com/BLAST.htm Due to its small form factor and ease of design, the BLAST modules enable a rapid solution for custom memory or processing requirements. BLAST SITE 1 2

• 4DSP FC6301, UM027 FC6301 User Manual r1.3 UM027 www.4dsp.com - 3 - Table of Contents 1 Acronyms and related documents ............................................................................. 5 1.1 Acronyms ................................................................................................................ 5 1.2 Related Documents ................................................................................................. 6 2 General description ...............................

• 4DSP FC6301, UM027 FC6301 User Manual r1.3 UM027 www.4dsp.com - 21 - 4.9 FPGA device configuration 4.9.1 Flash storage The FPGA firmware is stored on board in a flash device. The 512Mbit device is partly used to store the configuration for both FPGAs. In the default CPLD firmware configuration, the Virtex-6 device is directly configured from flash if a valid bitstream is stored in the flash. The flash is pre-programmed in factory with the default firmware example. CoolRunner-II CPLD XC2C256 VQ100 S29GL512M 512Mbit Flash Virtex-6 JTAG Header JTAG JTAG LED x4 DIP switch 8-bit parallel configuration DIP switch Figur

• 4DSP FC6301, UM027 FC6301 User Manual r1.3 UM027 www.4dsp.com - 17 - AJ1 DP_C2M_P3 A30 DP3_C2M_P AF4 DP_M2C_N3 A11 DP3_M2C_N AF3 DP_M2C_P3 A10 DP3_M2C_P AG2 DP_C2M_N4 MGT3_113 A35 DP4_C2M_N AG1 DP_C2M_P4 A34 DP4_C2M_P AD4 DP_M2C_N4 A15 DP4_M2C_N AD3 DP_M2C_P4 A14 DP4_M2C_P AC2 DP_C2M_N5 MGT1_114 A39 DP5_C2M_N AC1 DP_C2M_P5 A38 DP5_C2M_P AB4 DP_M2C_N5 A19 DP5_M2C_N

• 4DSP FC6301, UM027 FC6301 User Manual r1.3 UM027 www.4dsp.com - 6 - 1.2 Related Documents  3U CompactPCI specifications (PICMG 2.0 R3.0)  CompactPCI Hot Swap specifications (PICMG 2.1 R2.0)  VITA 57.1 FPGA Mezzanine Card Standard  Xilinx Virtex-6 documentation 2 General description The FC6301 is a high performance CompactPCI (cPCI) card with advanced digital signal processing capabilities. The design has been targeted for customer programmable implementations of complex FPGA algorithms for Digital Signal Processing (DSP) applications. The FC6301 product is in th

• 4DSP FC6301, UM027 FC6301 User Manual r1.3 UM027 www.4dsp.com - 4 - Appendix A: Errata .............................................................................................................27

• 4DSP FC6301, UM027 FC6301 User Manual r1.3 UM027 www.4dsp.com - 1 - FC6301 User Manual 4DSP LLC, USA Email: [email protected] This document is the property of 4DSP LLC and may not be copied nor communicated to a third party without the written permission of 4DSP LLC © 4DSP LLC 2013

• 4DSP FC6301, UM027 FC6301 User Manual r1.3 UM027 www.4dsp.com - 5 - 1 Acronyms and related documents 1.1 Acronyms A/D Analog to Digital Converter BLAST Board Level Advanced Scalable Technology CPLD Complex Programmable Logic Device D/A Digital to Analog Converter DCI Digitally Controlled Impedance DDR Double Data Rate DSP Digital Signal Processing FBGA Fineline Ball Grid Array FFT Fast Fourier Transformation FMC FPGA Mezzanine Card FPDP Front Panel Data Port FPGA Field Programmable Gate Array GPIO Gene

• 4DSP FC6301, UM027 FC6301 User Manual r1.3 UM027 www.4dsp.com - 18 - AH40 PRSNT_M2C_L I H2 PRSNT_M2C_L AJ42 PG_C2M O D1 PG_C2M Table 7: Miscellaneous FMC connections The I/O standard to be assigned depends on VADJ configuration, by default this is 2V5. Contact factory for other VADJ voltages. The FMC I2C bus signals connect to the CPLD and can be controlled from the FPGA using two signals per I2C line. The connections and CPLD logic are depicted in the following image. SCL_oe SCL SDA_oe SDA FPGA CPLD FMC 0 0 SCL SDA Figure 4: F

• 4DSP FC6301, UM027 FC6301 User Manual r1.3 UM027 www.4dsp.com - 8 - 3 Installation 3.1 Requirements and handling instructions  The FC6301 daughter card must be installed cPCI backplane compliant to the cPCI standard.  Do not flex the board and prevent electrostatic discharges by observing ESD precautions when handling the card. 3.2 Firmware and Software Drivers, API libraries and a program example working in combination with a pre-programmed fi

• 4DSP FC6301, UM027 FC6301 User Manual r1.3 UM027 www.4dsp.com - 9 - 4.1.2 P2 connections FPGA Pin P2 pin # Signal name Bank Voltage Notes AT26 A1 FP_RTM_0 1.8V Not available on LX240T AU27 A2 FP_RTM_1 1.8V Not available on LX240T AK23 B6 FP_RTM_10 1.8V Not available on LX240T BB26 B8 FP_RTM_11 1.8V Not available on LX240T BB27 B10 FP_RTM_12 1.8V Not available on LX240T AM23 C1 FP_RTM_13 1.8V Not available on LX240T AN23 C3 FP_RTM_14 1.8V Not available on LX2

• 4DSP FC6301, UM027 FC6301 User Manual r1.3 UM027 www.4dsp.com - 23 - 4.10 Power supply The Power is supplied to the FC6301 via the CompactPCI connectors. Several DC-DC converters generate the appropriate voltage rails for the different devices and interfaces present on board. The FC6301 power distribution is as follows: BLAST voltage*4 1v5/1v8 @ 6 A 3v3 @ 2A 5V cPCI 3v3 cPCI 12v cPCI LTC 1644 5v to 1v2 EN5365QI - MGT @ 1.3A 3v3 to 0v9 TPS54572 - ddr term @7A 3v3 to 2v5 TPS74401 - msic @ 1 A 2v5 0v9 1V2 5v BLAST voltage*4 1v5/1v8 @ 6 A 3v3 @ 2A SI7110DN SI7110DN 0.004 0.0

• 4DSP FC6301, UM027 FC6301 User Manual r1.3 UM027 www.4dsp.com - 24 - Table 15 : Power supply 4.11 Hotswap Hot Swap is the act of removal and insertion of cards into a platform while that system is operational. This process should not cause any failures on the systems power supply and system’s I/O signals. Protection of the card’s circuitry also needs to be taken into account in this process. A compact PCI board can implement three different types of hot swap:  Non Hot Swap

• 4DSP FC6301, UM027 FC6301 User Manual r1.3 UM027 www.4dsp.com - 20 - Virtex-6 FPGA 50MHz crystal CPLD VITA 57.1 FMC CDCV304 Clock synthesizer CDCEL925 PCIe-PCI bridge 100MHz Low jitter LVDS Jitter attenuator and buffer MGT FMC ref CLK MGT 16 MHz crystal cPCI clock 33/66 MHz Figure 5 : Clock tree 4.8.1 FMC GTX Reference Clock The FMC standard defines two high precision reference clocks that are driven from the FMC to the carrier. The FC6301 connects these clocks dir

• UM027 FC6301 User Manual r1.3 UM027 www.4dsp.com - 16 - R42 HB_N12 F32 HB12_N P42 HB_P12 F31 HB12_P T36 HB_N13 E31 HB13_N U36 HB_P13 E30 HB13_P T40 HB_N14 K35 HB14_N R40 HB_P14 K34 HB14_P T35 HB_N15 J34 HB15_N T34 HB_P15 J33 HB15_P T42 HB_N16 F35 HB16_N T41 HB_P16 F

• 4DSP FC6301, UM027 FC6301 User Manual r1.3 UM027 www.4dsp.com - 26 - 5 Environment 5.1 Temperature Operating temperature  0 ° C to +60 ° C (Commercial)  -40 ° C to +85 ° C (Industrial) Storage temperature:  -40 ° C to +120 ° C 5.2 Convection cooling The air flow provided by the chassis fans the FC6301 is enclosed in will dissipate the heat generated by the on board components. A minimum airflow of 300 LFM is recommended. Optionally a low profile heat sink/fan can be glued on top of the Quad ADC. The card has a

• 4DSP FC6301, UM027 FC6301 User Manual r1.3 UM027 www.4dsp.com - 2 - Revision History Date Revision Revision 2010-10-05 Draft 0.1 2010-11-21 Release 1.0 2013-04-08 Added the FMC pinout tables 1.1 2013-05-01 Updated Table 5: FMC GTX/GTH connections to use the MGTx_abc notation. Also fixed wrong reference to MGT bank 115 and changed it to MGT bank 113 1.2 2014-04-15 Added “Table 2: P2 connections” and updat

• 4DSP FC6301, UM027 FC6301 User Manual r1.3 UM027 www.4dsp.com - 25 - Parameter: Device 2 Formula On-chip temperature ADT7411 Die Temperature On-chip AIN0 (V DD ) +3.3V External AIN1 BLAST0_vcore AIN1 External AIN2 BLAST2_vcore AIN2 External AIN3 5V AIN3*(1249/249) External AIN4 0V9 AIN4 External AIN5 VADJ AIN5 External AIN6 1V8 AIN6 External AIN7 12V current Tbd External AIN8 2V5 AIN8 Table 17: monitoring device 2 connections

• 4DSP FC6301, UM027 FC6301 User Manual r1.3 UM027 www.4dsp.com - 11 - 4.2 cPCI P0 connector A one lane PCI express is connected to a bridge device (PI7C9X110) thus making the Virtex- 6 FPGA available for access on the parallel PCI bus. The following performances have been recorded on the bus.  PCI 33 MHz: Host to FC6301 60 Mbytes/s sustained  PCI 33 MHz: FC6301 to Host 110 Mbytes/s sustained  PCI 66 MHz: Host to FC6301 120 Mbytes/s sustained  PCI 66 MHz: FC6301 to Host 140 Mbytes/s sustained PI7C9X110 cPCI-P1 11 PCIexpress 1 lane 32 bits PCI 33 or 66 MHz V

• UM027 FC6301 User Manual r1.3 UM027 www.4dsp.com - 14 - FPGA Pin Net Name FMC HPC Pin Number Pin Name AE32 HA_N00_CC F5 HA00_N_CC AD32 HA_P00_CC F4 HA00_P_CC AJ35 HA_N01_CC E3 HA01_N_CC AH34 HA_P01_CC E2 HA01_P_CC AM42 HA_N02 K8 HA02_N AL42 HA_P02 K7 HA02_P AM41

• UM027 FC6301 User Manual r1.3 UM027 www.4dsp.com - 15 - AB36 HA_N19 F20 HA19_N AC36 HA_P19 F19 HA19_P AB33 HA_N20 E19 HA20_N AB32 HA_P20 E18 HA20_P AB42 HA_N21 K20 HA21_N AA42 HA_P21 K19 HA21_P AB41 HA_N22 J22 HA22_N AA41 HA_P22 J21 HA22_P AA40 HA_N23 K23 HA23_N AB39 HA

• 4DSP FC6301, UM027 FC6301 User Manual r1.3 UM027 www.4dsp.com - 7 - BLAST 1 BLAST BLAST XC6VLX240T XC6VLX365T XC6VLX550T XC6VSX315T XC6VSX475T JTAG CPLD LED x4 Optional FMC 3 VITA 57 10x MGT 3.125Gbps cPCI J1 32-bit 33/66MHz CPLD PCIe x1 PCIe x1 to PCI bridge cPCI J2 user I/O Virtex-6 BLAST 512Mbit parallel flash Optional Gigabit 3 Ethernet 2x optional Mini USB (UART) 128Mbit SPI flash 2 72 single-ended user defined IO 4 160 single ended 80 LVDS pairs Figure 1: FMC122 block diagram 1 4 th BLAST site only fully supported on SX475T and LX550T devices, on other devices only the DDR2 BLAST (A) is supported. 2 Refer to the Appendix for Errata. 3

• UM027 FC6301 User Manual r1.3 UM027 www.4dsp.com - 13 - Y37 LA_N14 C19 LA14_N W37 LA_P14 C18 LA14_P Y35 LA_N15 H20 LA15_N AA35 LA_P15 H19 LA15_P AA30 LA_N16 G19 LA16_N Y30 LA_P16 G18 LA16_P AB31 LA_N17_CC D21 LA17_N_CC AA31 LA_P17_CC D20 LA17_P_CC V30 LA_N18_CC

• 4DSP FC6301, UM027 FC6301 User Manual r1.3 UM027 www.4dsp.com - 12 - 4.4 FPGA Mezzanine Card (FMC) The Virtex-6 FPGA interfaces to an FPGA Mezzanine Card (FMC) via a high pin count (HPC) VITA 57.1 site. All the differential and control signals are connected to the Virtex-6 FPGA. The FC6301 also connects all ten high speed differential signals (DP_M2C[9..0] and DP_C2M[9..0]). The FMC site provides flexibility for adding analog and/or digital IO via customer developed, third party or 4DSP FMC boards. 4DSP offers a wide variety of FMC cards that can be used on the FC6301: http://www.4dsp.com/fmc.php 4.4.1 Bank A (LA, HA) connections Di

• 4DSP FC6301, UM027 FC6301 User Manual r1.3 UM027 www.4dsp.com - 10 - H26 A20 FP_RTM_44 1.8V Not available on LX240T G26 A21 FP_RTM_45 1.8V Not available on LX240T F26 B12 FP_RTM_46 1.8V Not available on LX240T K25 B14 FP_RTM_47 1.8V Not available on LX240T J25 B16 FP_RTM_48 1.8V Not available on LX240T B27 B18 FP_RTM_49 1.8V Not available on LX240T AW27 A9 FP_RTM_5 1.8V Not available on LX240T A27 B19 FP_RTM_50 1.8V Not available on LX240T J23 B20 FP_RTM_51 1.8V Not available on LX240T K23 C12 FP_RTM_52 1.8V Not available on LX240T M19 C14 FP_RTM_53 1.8V

Related Products and Documents (PCI Card):

Comparable Devices:

Similar Resources:

• Winnov Videum 1000 Plus (96 pages) 1Videum 1000 PlusVideum 1010 PlusVideum 1000 VO PlusVideum 4100/4400Videum Conference Pro XPVideumII Broadcaster Base KitVideumII Broadcaster Lite KitHardware and SoftwareInstallation Guide10/2002 EU010Technical Support: [email protected]: http://www.winnov.deSales Contact: [email protected]: +49 8243 9684 0 …

• ANTAIRA MSC-202A-V2 (4 pages) Congratulations on your purchasing this high performance PCI Express serial and parallel I/O adapter. The adapter is high speed PCI Express bus based and plug-and-play compliant. Its serial ports are fully 16C950 UART compatible with most of the RS232C devices available from the market. The common features of the PCI Express I/O family as follows: …

• Moxa Technologies CP-132EL Series (6 pages) P/N: 1802001320021 *1802001320021* CP-132EL/CP-132EL-I Quick Installation Guide PCI Express Multiport Serial Board Edition 2.0, February 2017 Technical Support Contact Information www.moxa.com/support Moxa Americas: Toll-free: 1-888-669-2872 Tel: 1-714-528-6777 Fax: 1-714-528-6778 Moxa China (Shanghai office): Toll-free: 800-820-5036 Tel: +86-21-5258-99 …

• Seagate Lyve Mobile Array (23 pages) Lyve Mobile Mount and PCIe Adapter - Front Loader U ser ManualClick here to access an up-to-date online versionof this document. You will also find the most recent content as well as expandable illustrations, easiernavigation, and search capability. …

• Goepel PXI 61 Series (56 pages) GOEPEL electronic GmbH Goeschwitzer Str. 58/60 •D-07745 Jena + 49-3641-6896-597 • [email protected] • www.goepel.com Series 61 PXI/ PCI Controller Family User Manual (Translation of Original docu) Document Version 2.0 …

• Positron V-310 E1 (2 pages) 3. Connect to the browser based configurator by opening the browser to the IP address. The following is the default connection credentials: Username: admin Password: mysecretSupportTo ensure your PBX is working, try the following:• Check the LEDs on the PCI bracket, the GREEN LED light is solid• Plug an anal …

Comments, Questions and Opinions: