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Sharp DV-760X Service Manual

Sharp DV-760X Manual Online:

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Sharp DV-760X User Manual
Sharp DV-760X User Guide
Sharp DV-760X Online Manual

Text of Sharp DV-760X User Guide:

  • Sharp DV-760X, DV-760X 11-28 • Block Diagram PIN No. PIN NAME I/O ATTR I/O CELL PDV CELL LIO CELL 1 VDD P VDD * * 2 HADR0 I IDC * * 3 HADR1 I IDC * * 4 HADR2 I IDC * * 5 HCS I IDC * * 6 HWR I IDC * * 7 HRD I IDC * * 8 HDAT0 B BDC3 PDV2T * 9 HDAT1 B BDC3 PDV2T * 10 HDAT2 B BDC3 PDV2T * 11 HDAT3 B BDC3 PDV2T * 12 HDAT4 B BDC3 PDV2T * 13 HDAT5 B BDC3 PDV2T * 14 HDAT6 B BDC3 PDV2T * 15 HDAT7 B BDC3 PDV2T * 16 VSS P VSS PDV2T * 11-22. IC6511 IX1535GE DSP I/F 6 VD1 DGND1 AUDATA3, XMT958 WR, DS EMWR, GPIO10 RD, R/W, EMOE, GPIO11 A1, SCDIN A0, SCCLK DATA7, EMAD7, GPIO7 DATA6, EMAD6, GPIO6 DATA5, EMAD5, GPIO5 DATA4, EMAD4, GPIO4 VD2 DGND2 DATA3, EMAD3, GPIO3 DATA2, EMAD2, GPIO2 DATA1,

  • Sharp DV-760X, DV-760X 11-25 11-19. IC6501 LC8905V DIGITAL AUDIO INTERFACE Pin No. Terminal name I/O Operation function 1 DIN1 I Amplifier built-in data input terminal (coaxial, corresponding to optical module) 2 DIN2 I Data input terminal (corresponding to optical module) 3 E/DOUT O Emphasis, input biphase, validity flag output terminal 4 VDD Power 5 R I VCO gain control input terminal 6 VIN I VCO free run setting input terminal 7 VCO O LPF setting terminal of PLL 8 GND Grounding 9 CKSEL I System clock selection input terminal 10 XMODE I Reset input terminal 11 AVOCK I PLL erroneous lock prevention clock input terminal 12 TEST1 I Test input terminal (to be grounded usually) 13 TEST2 I Test input

  • Sharp DV-760X, DV-760X 31 MRST Input Reset signal 32 VSS – Digital GND 33 VDD – Digital power +3.3V 34 PXDO (0) Output Pixel data output 35 PXDO (1) Output 8-bit parallel video data conforming to ITU-R BT.601 and BT.656 standard (Cb/Y/Cr/Y) 36 PXDO (2) Output MSB=PXDO(7), LSB=PXDO(0) 37 PXDO (3) Output 38 PXDO (4) Output 39 PXDO (5) Output 40 VSS – Digital GND 41 VDD – Digital power +3.3V 42 PXDO (6) Output 43 PXDO (7) Output 44 PXCLKO Output Reference clock output for pixel data. 27 MHz 45 VSYNCO Output Vertical sync signal output 46 HSYNCO Output Horizontal sync signal output 47 VSYNCI Input Vertical sync signal output 48

  • Sharp DV-760X, DV-760X 7. EXPLANATION OF MECHANISM (1) Tray loading mechanism When the tray loading motor rotates counterclockwise, motion is transmitted to the slide rack D through the intermediate gear 1 A , intermediate gear 2 B and tray pinion C , resulting in insignificant motion in the arrow direction. The slide rack is linked with the operating chassis. It lowers the pickup mechanism. The protrusion of slide rack E is linked with the tray through the groove at the rear side of tray, so that the tray is pushed ahead a little. When the tray is pushed out, the slide rack is disconnected from the tray pinion, and at the same t

  • Sharp DV-760X, DV-760X Pin No. Pin name Type Direction Function Address bus output for SDRAM connection. Tip select output for SDRAM connection. Tip select output terminal for SDRAM connection. It is connected to 2nd SDRAM. RAS output terminal for SDRAM connection. Clock output terminal for SDRAM connection. CAS output terminal for SDRAM connection. Write enable output terminal for SDRAM. Data masking output terminal for SDRAM. Bi-directional data bus for SDRAM. Function Data error input for DVD-DSP connection. Sector start input for DVD-DSP connection. Data valid input for DVD-DSP connection. Data strobe input for DVD-DSP connection. Data request output for DVD-DSP

  • Sharp DV-760X, DV-760X 11-23 Pin No. Terminal name I/O Operation function 1 NC – Not connected. 2 SCKI I System clock input. (256fs/384fs) 3 TEST – Not connected. Be sure to open. 4 ML I Control data input. Enable terminal. * 1 5 MC I Control data input. Bit clock terminal. * 1 6 MD I Control data input. Data terminal. * 1 7 RSTB I Reset input terminal. Active “L” * 1 8 ZERO O Infinity zero flag output terminal. Open drain. 9 VOUTR O Rch analog voltage output terminal. 10 AGND – Analog GND terminal. 11 VCC – Analog power terminal. 12 VOUTL O Lch analog voltage output terminal. 13 CAP – Internal bias decouple terminal 14 BCKIN I Audio dat

  • Sharp DV-760X, Ref. No. Part No. ★ Description Code Ref. No. Part No. ★ Description Code 82 DV-760X 17-10 MECHANISM PARTS 1 CCHSS0164GE02 Chassis Ass'y BU 1-1 MSPRC0216GEZZ Rack Spring AB 1-2 LX-BZ3163GEFN Screw(M1.7+2.5S) AC 1-3 LX-BZ1003GEZZ Thrust Holding Screw AC 1-4 LANGT9174GEFW Sled Motor Angle AD 1-5 LX-BZ3185GEFN Screw(M1.4+2.5S) AB 1-6 LX-BZ3192GEZZ Screw(M1.4+3.5S) AA 1-7 NGERR1009GEZZ Rack AD 1-8 NGERR1010GEZZ Double-acting Rack AC 1-9 CMOTV1022GE03 Sled Motor AP 1-10 QCNW-7914GEZZ Sled Motor Read Wire AC 1-11 PCUSU0001GEZZ Sled C

  • Sharp DV-760X, DV-760X Pin No. Terminal name I/O Operation function 1 CVBS/Cb/B1 O Analog composite video signal output or Cb or B signal output current drive (positive) 2 CVBS/Cb/B1 O Analog composite video signal output or Cb or B signal output current drive (negative) 3 CVBS/Cb/B1 Vdd Power Supply for CVBS / Cb/B DAC1 circuit 4 Y/G 1 O Analog luminance or G signal output current drive (positive) 5 Y/G 1 O Analog luminance or G signal output current drive (negative) 6 Y/G 1Vdd Power Supply for Y/G DAC1 circuit 7 C/Cr/R 1 O Analog chrominance signal output or Cr or R signal output current drive (positive) 8 C/Cr/R 1 O Analog chrominance signal output or Cr or R signal output c

  • Sharp DV-760X, DV-760X 11-6. IC501 IX1614GE FLASH Symbol Type Name and function Byte selection address: When the device is in the x8 mode, the low or high order byte is DQ 15 /A -1 Input selected. It is not used in the x16 mode. (If BYTE# is high, DQ 15 /A -1 input circuit does not operate.) A 0 -A 12 Input Word selection address: Selection of one word of 16k byte block. These addresses are latched during data wiring operation. A 13 -A 17 Input Block selection address: Selection of 1/32 erase block. These addresses are latched during data writing, erasing and lock block operation. Low order byte data input/output: Command user interface writing cycle data and command DQ 0 -DQ 7 Input/Output input.

  • DV-760X Pin No. Terminal name I/O Operation function 1 EIN I RF signal input. Input of RF signal output of optical pickup. 2 GND1 – Ground 3 S/DUAL I Single layer/dual layer selection signal input. 4 AIN I RF signal input. Input of RF signal output of optical pickup. 5 BIN I RF signal input. Input of RF signal output of optical pickup. 6 CIN I RF signal input. Input of RF sig

  • DV-760X 6. DISASSEMBLY AND REPLACEMENT OF MAIN PARTS 6-1. DISASSEMBLY 1.Remove five screws (A), and remove the cabinet. Note: When assembling it, tighten the screws in order of 1 - 2 . (Because the set may rise a little by tightening the screws.) 6-1 17. Remove five screws (T) which install the volume PWB of the front panel. 18. Remove six screws (U) which install th

  • DV-760X 11-7. IC504 IX1478GE SYSCON MD 2 V cc V cc V cc V cc V cc V ss V ss V ss V ss V ss V ss V ss V ss PD 7 /D 15 PD 6 /D 14 PD 5 /D 13 PD 4 /D 12 PD 3 /D 11 PD 2 /D 10 PD 1 /D 9 PD 0 /D 8 PE 7 /D 7 PE 6 /D 6 PE 5 /D 5 PE 4 /D 4 PE 3 /D 3 PE 2 /D 2 PE 1 /D 1 PE 0 /D 0 PA 7 /A 23 /IRQ7 PA 6 /A 22 /IRQ6 MD 1 MD 0 PF 7 /ø PF 6 /AS PF 5 /RD PF 4 /HWR EXTAL XTAL STBY R

  • DV-760X 11-27 AUDATA1—Digital Audio Output 1: Pin 40 PCM multi-format digital-audio data output, capable of two-channel 20-bit output. This PCM output defaults to DGND as output until enabled by the DSP software. AUDATA0—Digital Audio Output 0: Pin 41 PCM multi-format digital-audio data output, capable of two-, four-, or six-channel 20-bit output. This PCM

  • Sharp DV-760X, DV-760X 11-9. IC507 BR93L46F EEPROM Terminal Terminal name In/Output Function 2 VCC – Power 7 GND – All input/output reference voltage, 0V 3 CS Input Tip select input 4 CLK Input Sirial clock input 5 DIN Input Start bit, operation code, address and serial data input 6 OCNT Output Serial data output, READY/BUSY internal status indication output • Block Diagram C S S K D I D O Dummy bit Instruction register Data resistor R/W Amp. Address buffer Address Decoder Instruction decode control clock generation Wave voltage detection Write inhibition High voltage generation bit EEPROM Aray 1,024 6bit 6bit 16bit 16bit 1 VDD �

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