Prima PH-42FB7 Service Manual
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24 4. MST9883 MST9883 is a Triple Video A/D Converter with Clamps & Pixel Clock Synthesizer. The triple ADC support 12 - 110 MHz Sampling Rate. It integrated 5-bit pixel clock phase adjustment for precise sample timing control. It’s Output support 4:2:2 Format Mode and it can Pin Compatible with AD9883A. Block diagram of MST9883 is flow:
Prima PH-42FB7, 12 3. Copy the update tools (iDev.exe) to the path you want to do it, and double click it. 4. Select “setup” menu. 5. Confirm the Serial port is right. Base on the port which using for update. And set the band rate to 115200 (default).
37 (8) NTSC channel no picture (9) ATSC channel no picture Note : The I2C bus line control of TUNER is switch through the bus line of N228, so after checking the power supply and peripheral circuit of TUNER226, it is still no picture in NTSC and ATSC channel, please check N228 emphatically. Check
Prima PH-42FB7, 29 Diagnosis for Plasma Screen of PH42/50FBXX And Maintenance of the Functions of Various Modules on Screen 1. Functions of Various Modules on Screen As shown in the figure below, PDP screen can be divided into power supply board, X driving board, Y driving board, logic board, logic BUFFER board (E, F, G), Y BUFFER board (upper and lower), COF etc.: * Power supply board: to supply power for the screen, other functional modules on the screen, our own main board, and video frequency processing board. * X driving board: to produce and provide driving signal for X electrode according to the time sequence signal sent from logic board.
Prima PH-42FB7, 17 Working principle analysis of the unit 1. NTSC signal flow: Antenna reception NTSC signal send to the integrative tuner FQD1236, which contains HF and IF amplifier circuit and video decoding circuit. It is controlled by main IC ZR39660 (inside CPU) through I2C bus. The NTSC signal via frequency tuning, HF amplification, IF amplification, system switching and decoding, output video signal TV-CVBS of 1Vpp and sound IF signal (SIF). TV-CVBS and AV1-CVBS, AV2-CVBS input from AV terminal, via switch IC HEF405
Prima PH-42FB7, 23 Pin configuration of CAS220/CS: Pin descriptions of CAS220/CS: 61: RESET_N 79, 80 oscillator 13 Select I2C address 16: I2C data for host communication with the tuner 18: I2C clock to the tuner 19: I2C clock from host 20: I2C data from/to host 93,94: Differential input for IF 96,97: Differential input for SIF 63: Digital Sound Word select (L/R select) 65: Digital Sound Serial data output 66: Digital Sound Serial clock. 17,30,46,62,74,82,84: Power Supply 3.3V 5,9,22,37,53,69,75,78,86,87,99: Power Supply 1.8V 6,7,15,23,33,35,45,55,60,70,73,76,77,81,83,85,88
Prima PH-42FB7, 13 6. Select the “Image path” menu. 7. Confirm it’s the right file. 8. If it’s not right(Maybe you didn’t select it before),click the “…”button to select “*.ecc” file. Sometimes the image file you got it will be “*.rar ”or “*.zip” zip file, needs unzip it first.
Prima PH-42FB7, 7 and “CH-“ to move cursor up and down, when the cursor stays on a certain adjustment item, press “VOL-“ and “VOL+” to adjust. Press “MENU” exit to the level one factory menu; press “EXIT” to exit from the factory menu at any situation. Note: channel switch isn’t available at adjustment menu, only after return to level one factory menu, you can switch channel. 3.2 adjustment of white balance 3.2.1 input 16 level gray-scale signal from VG849 to HDMI channel (TMIING: select a
38 (10) YprPb or Ycrcb channel no picture (11) D-sub channel no picture Check if pin4/7/9 of NB07 output signals? Yes N o Check if pin64/66/67 o f N A51 are normal? Check if pin4/7/9 of NB08 outpu t signals? Yes N o Yes N o Check resisto r rows RA63~ RA6
CONTENTS Safety precautions………………………………………………………………………..… Alignment instructions …………………………….…….………………………………… Method of software upgrading……………….…….……………………………………….……. Working principle analysis of the u
Prima PH-42FB7, 41 AC IN EMI Rectify PFC 18V AP1501 AP1501 AP1501 AP1501A Fliter 3V3SC 5VSC 5VCTRL 12VSC 18VSC 5VSB Va Vs STR –A6159M Isolation STR–F6468 Isolation STR–X6769 DC/DC Isolation DC/DC DC/DC DC/DC DC/DC DC/DC DC/DC MCU ATMEGA8L IIC IR KEY VGA_H∕V LED RESET 5VCTRL.Va.Vs Overvoltage.undervoltgae test Input AC voltage test Output voltage control ON/OFF Va,Vs active dischage control PFC OUT 400V L4981BD STR–F6467 Isolation DC/DC Block diagram of LG 50” power board
Prima PH-42FB7, 21 (7) UART and I2C Interface N1: UART 0 Transmit P1: UART 0 Receive R1:I2C Compatible Clock 0 P2:I2C Compatible Data 0 M3:I2C Compatible Clock 1 M2:I2C Compatible Data 1 (8) Miscellaneous M4, N3: Two pins required to support the 24.576 MHz crystal N5: Power On Reset L4: Infrared Receive 2. j-L003(Higobashi) The j-L003(Higobashi) LSI provides a variety of image quality adjustment functions designed to produce sharp, well-defined coloration in personal computer LCD monitors and LCDTV screens, as well
Prima PH-42FB7, 8 2 31.469 59.94 HDTV 480p 3 44.955 59.94 HDTV 720p 4 33.716 59.94 HDTV 1080i 4.4 VGA terminal Input VGA signal (VG-849 signal generator), separate input VGA format signal of table 2 and check if the picture and sound are normal. If the image is deflection of the H-field, select manual correction of Advanced Video Menu. 4.5 HDMI terminal HDMI signal format receives the three high-definition signals: 480I, 480P, 720P/60Hz, 1080I/60Hz, except for the table 2 signal. Check if the image (contain HDCP ON and OFF) and sound are normal. Table 2 VGA signal format No Resolutio
Prima PH-42FB7, 34 (4) with sound but no picture With sound but no picture Display OSD MENU? Display LOGO? If pin5 of X602 (IRR) has signal? Yes N o Yes N o If there is no picture in all channels? Check if the crystal in data processing board starts, DDR clock and DDR SDRAM are normal? Yes N o Check N108 an d its peripheral circuit Refer to (6), (7), (8), (9), (10), (11), (12) checking procedure Refer to (5) checking p rocedure Check N801, N802, DD R and their peripheral circui t and power supply Yes N o
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